CS49530X datasheet(36/37 Pages) CIRRUS

36 / 37 page

CS4953xx Data Sheet

32-bit Audio Decoder DSP Family

DS705F2

PP8

April, 2011

Added Tj conditions to Section 5.2.

Changed 500 ma to 350 ma in Section 5.4.

Removed references to DSD.

Updated legal statement.

Updated features list.

Added notes to Section 5.10.

Updated Section 5.16 “Switching Characteristics — Digital Audio Slave Input Port”

on page 23

Updated Section 5.17 “Switching Characteristics — Digital Audio Output Port” on

page 24.

PP9

August, 2011

In section Section 5.9, added Max value of DCLK frequency value in

CS49530x-DVZ and CS49531x-DVZ to 130 MHz; added Min value of DCLK period

in CS49530x-DVZ and CS49531x-DVZ to 7.7 ns. Added notes to Section 5.10.

Updated Figure 14.

PP10

February, 2012

Updated trademark information throughout document and boilerplate. Updated max

Fdclk value for DVZ parts to 131 MHz and min DCLK value for DVZ parts to 7.63 ns

in Section 5.9. Updated tspickl and tspickh minimum values in Section 5.11. Added

tdaisstlr and tdaislrts to Section 5.16. Changed max spec of Tdaosdv in Section

5.17. Updated Tsddh minimum value in Section 5.18.

Revision

Date

Changes

CS49530X Datasheet(PDF) 36 Page - Cirrus Logic