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SLG46170 Datasheet(PDF) 45 Page - Dialog Semiconductor |
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SLG46170 Datasheet(HTML) 45 Page - Dialog Semiconductor |
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45 / 87 page ![]() 000-0046170-103 Page 44 of 86 SLG46170 11.0 Digital Storage Elements (DFFs/Latches) There are six D Flip Flop / Latches (DFF/Latch logic cells within the SLG46170 available for design. The source and destination of the inputs and outputs for the DFF/Latches are configured from the connection matrix. All DFF/Latch macrocells have user selection for initial state. DFF0 has the option to connect both the Q and Q Bar outputs to the connection matrix, DFF1, DFF2, DFF3, DFF5 and DFF6 can only connect the Q output to the matrix. The macrocells DFF0, DFF1, DFF2 and DFF3 have an additional input from the matrix that can serve as a nSet or nReset function to the macrocell. Note that one of the Combination Function Macrocells (LUT 2_0 / DFF4) can also operate as a DFF or a 2-bit LUT please see Section 10.1 2-Bit LUT or D Flip Flop Macrocells for the description of this Combination Function macrocell. The operation of the D Flip-Flop and Latch will follow the functional descriptions below: DFF: CLK is rising edge triggered, then Q = D; otherwise Q will not change Latch: if CLK = 0, then Q = D if CLK = 1, then Q will not change Figure 11. DFF/Latch0 DFF/Latch0 D reg <693> From Connection Matrix Output <20> To Connection Matrix Input <19> CK From Connection Matrix Output <19> Q Q To Connection Matrix Input <18> nRSTZ nSETZ 0 1 From Connection Matrix Output <21> 0 1 reg <694> reg <695> Initial Polarity Select DFF or Latch Select |
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