SLG46170 datasheet(73/87 Pages) DIALOG

73 / 87 page

000-0046170-103

Page 72 of 86

SLG46170

reg<692:677> LUT4_0 data

reg<693>

DFF0 or Latch Select

0: DFF function

1: Latch function

reg<694>

DFF0 nRST/nSET select

0: nRST from matrix out

1: nSET from matrix out

reg<695>

DFF0 Initial polarity select

0: Low

1: High

reg<696>

DFF1 or Latch Select

0: DFF function

1: Latch function

reg<697>

DFF1 output select (Q or nQ)

0: Q output

1: nQ output

reg<698>

DFF1 nRST/nSET select

1: nSET from matrix out

0: nRST from matrix out

reg<699>

DFF1 Initial polarity select

0: Low

1: High

reg<700>

DFF2 or Latch Select

0: DFF function

1: Latch function

reg<701>

DFF2 output select (Q or nQ)

0: Q output

1: nQ output

reg<702>

DFF2 nRST/nSET select

1: nSET from matrix out

0: nRST from matrix out

reg<703>

DFF2 Initial polarity select

0: Low

1: High

reg<704>

DFF3 or Latch Select

0: DFF function

1: Latch function

reg<705>

DFF3 output select (Q or nQ)

0: Q output

1: nQ output

reg<706>

DFF3 nRST/nSET select

1: nSET from matrix out

0: nRST from matrix out

reg<707>

DFF3 Initial polarity select

0: Low

1: High

reg<708>

DFF5 or Latch Select

0: DFF function

1: Latch function

reg<709>

DFF5 output select (Q or nQ)

0: Q output

1: nQ output

reg<710>

DFF5 Initial polarity select

0: Low

1: High

reg<711>

DFF6 or Latch Select

0: DFF function

1: Latch function

reg<712>

DFF6 output select (Q or nQ)

0: Q output

1: nQ output

reg<713>

DFF6 Initial polarity select

0: Low

1: High

reg<714>

Counter/Delay0 mode select

0: Delay Mode

1: Counter Mode

Address

Signal Function

SLG46170 Datasheet(PDF) 73 Page - Dialog Semiconductor

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