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AD7293BCPZ Datasheet(PDF) 14 Page - Analog Devices |
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AD7293BCPZ Datasheet(HTML) 14 Page - Analog Devices |
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14 / 78 page ![]() AD7293 Data Sheet Rev. B | Page 14 of 78 Pin Number Mnemonic Description 12 VDRIVE Drive Voltage Reference Level of the SPI Bus from 1.7 V to 5.5 V. 13 DVDD Digital Supply Voltage from 4.5 V to 5.5 V. 14 DACVDD-UNI DAC Positive Supply Pin for the Unipolar DAC Output Amplifiers on UNI-VOUT0, UNI-VOUT1, UNI- VOUT2, and UNI-VOUT3. 15, 16, 18, 19 UNI-VOUT0, UNI-VOUT1, UNI-VOUT2, UNI-VOUT3, Unipolar DAC Outputs. The clamp and power-on reset voltage for these DACs is 0 V. 17, 22, 35, 43 AGND Analog Ground. Connect both the AGND and DGND pins to the ground plane of the system. 20 VREFIN Reference Input to the Device. Connect this pin to an external reference voltage, or tie this pin to VREFOUT. 21 VREFOUT 2.5 V Reference Output. Connect to VREFIN to operate in internal reference mode. An optional 10 nF capacitor is recommended between the reference output and AGND for noise filtering. 23, 24, 27, 28 BI-VOUT0, BI-VOUT1, BI-VOUT2, BI-VOUT3 Bipolar DAC Outputs in Open-Loop Mode and Integrator Outputs in Closed-Loop Mode. The clamp and power-on reset voltage for these DACs is dictated by the VCLAMPx pins. 25 AVSS DAC Negative Supply Pin for the BI-VOUT0, BI-VOUT1, BI-VOUT2, and BI-VOUT3 DAC Output Amplifiers. 26 DACVDD-BI Analog Supply Pin for BI-VOUT0, BI-VOUT1, BI-VOUT2, and BI-VOUT3. Connect AVDD and DACVDD-BI to the same potential. 29 VCLAMP1 Power-On Reset and Clamp Voltage for BI-VOUT2 and BI-VOUT3. 30 VCLAMP0 Power-On Reset and Clamp Voltage for BI-VOUT0 and BI-VOUT1. 31, 33, 36, 38 RS3−, RS2−, RS1−, RS0− Negative Connection for External Shunt Resistors. 32, 34, 37, 39 RS3+, RS2+, RS1+, RS0+ Positive Connection for External Shunt Resistors. 40 PA_ON Power Amplifier On. This pin drives an external, positive channel metal oxide semiconductor (PMOS) switch capable of turning on/off the drain current to a PA transistor. The maximum voltage is set by PAVDD and limited to AVSS + 60 V. The power amplifier is turned on when the output is low. The AVSS and AVDD supply alarms can be configured to automatically trigger PA_ON. An alert condition can be configured to trigger PA_ON. Additionally, PA_ON can be turned on/off by issuing a register write. 41 PAVDD Power Supply for the PA_ON Control Signal. This pin is limited to 4 V to AVSS + 60 V. 42 REFADC Internal ADC Reference Voltage. The output at this pin is half the reference value (VREFIN), 1.25 V. Connect decoupling capacitors to this pin to decouple the reference buffer. For best performance, connect a 4.7 µF compensation capacitor between REFADC and AGND. For stability, the amplifier requires a minimum capacitance of 220 nF (X7R/C0G ceramic) connected between REFADC and AGND, located as close to the AD7293 as possible (no more than 1 Ω of interconnect resistance). 44 AVDD Supply Voltage for All of the Analog Circuitry on the AD7293. The operating range is 4.5 V to 5.5 V. Connect AVDD and DACVDD-BI to the same potential. 45 to 48 VIN3, VIN2, VIN1, VIN0 ADC Analog Inputs. Unused inputs must not be left floating. The input range of these pins is register selectable: 0 V to 1.25 V, 0 V to 2.5 V, or 0 V to 5 V. 49, 50, 51, 52 D1−, D1+, D0−, D0+ Temperature Sensor Analog Inputs. Connect these pins to the external temperature sensing transistor. Tie these pins to AGND if unused. 53 GPIO3/ALERT0 General-Purpose Input/Output 3 Pin (GPIO3, Default as Input). Alert 0 Pin (ALERT0). When ALERT0 is configured as an alert, this pin acts as an out of range indicator. Open-drain output whether in GPIO mode or alert mode. The polarity of this pin is register selectable. A pull-up resistor connected to VDRIVE is required. 54 GPIO2/BUSY General-Purpose Input/Output 2 Pin (GPIO2, Default as Input). Busy Pin (BUSY). When BUSY is configured as a busy output, this pin becomes active when a conversion is in progress. Open-drain output whether in GPIO mode or busy mode. The polarity of this pin is register selectable. A pull-up resistor connected to VDRIVE is required. 55 GPIO1/CONVST General-Purpose Input/Output 1 Pin (GPIO1, Default as Input). This pin is an open-drain output in GPIO mode. The polarity of this pin is register selectable. ADC External Convert Start Input Pin (CONVST). CONVST triggers conversions via this pin. The CONVST pin is useful for synchronizing the ADC sampling instant with an external source. A pull-up resistor connected to VDRIVE is required in GPIO mode or if unused. 56 GPIO0/IS BLANK General-Purpose Input/Output 0 Pin (GPIO0, Default as Input). This pin is an open-drain output in GPIO mode. The polarity of this pin is register selectable. A pull-up resistor connected to VDRIVE is required in GPIO mode or if unused. Current Sensor Conversion Blank Pin (IS BLANK). This pin can blank current sensor conversions and the polarity of this pin is register selectable. |
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