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HT32F22366 Datasheet(PDF) 14 Page - Holtek Semiconductor Inc |
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HT32F22366 Datasheet(HTML) 14 Page - Holtek Semiconductor Inc |
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14 / 56 page ![]() Rev. 1.00 14 of 56 �ove��e� 0�� �01� 3�-Bit A��® Co�tex®-M3 MCU HT3�F1�365/HT3�F1�366/HT3�F��366 Smart Card Interface – SCI ▆ Supports ISO 7816-3 standard ▆ Character mode ▆ Single transmit buffer and single receive buffer ▆ 11-bit ETU (elementary time unit) counter ▆ 9-bit guard time counter ▆ 24-bit general purpose waiting time counter ▆ Parity generation and checking ▆ Automatic character retry on parity error detection in transmission and reception modes The Smart Card Interface is compatible with the ISO 7816-3 standard. This interface includes Card Insertion/Removal detection, SCI data transfer control logic and data buffers, internal Timer Counters and corresponding control logic circuits to perform all the necessary Smart Card operations. The Smart Card interface acts as a Smart Card Reader to facilitate communication with the external Smart Card. The overall functions of the Smart Card interface are controlled by a series of registers including control and status registers together with several corresponding interrupts which are generated to get the attention of the microcontroller for SCI transfer status. Inter-IC Sound – I2S ▆ Master or slave mode ▆ Mono and stereo ▆ I2S-justified, Left-justified, and Right-justified mode ▆ 8/16/24/32-bit sample size with 32-bit channel extended ▆ 8 × 32-bit Tx & Rx FIFO with PDMA supported ▆ 8-bit Fractional Clock Divider with rate control The I2S is a synchronous communication interface that can be used as a master or slave to exchange data with other audio peripherals, such as ADCs or DACs. The I2S supports a variety of data formats. In addition to the stereo I2S-justified, Left-justified and Right-justified modes, there are mono PCM modes with 8/16/24/32-bit sample size. When the I2S operates in the master mode, then when using the fractional divider, it can provide an accurate sampling frequency output and support the rate control function and fine-tuning of the output frequency to avoid system problems caused by the cumulative frequency error between different devices. Cyclic Redundancy Check – CRC ▆ Supports CRC16 polynomial: 0x8005, X16+X15+X2+1 ▆ Supports CCITT CRC16 polynomial: 0x1021, X16+X12+X5+1 ▆ Supports IEEE-802.3 CRC32 polynomial: 0x04C11DB7, X32+X26+X23+X22+X16+X12+X11+X10+X8+X7+X5+X4+X2+X+1 ▆ Supports 1’s complement, byte reverse & bit reverse operation on data and checksum |
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