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MB95F856K Datasheet(PDF) 4 Page - Cypress Semiconductor |
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MB95F856K Datasheet(HTML) 4 Page - Cypress Semiconductor |
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4 / 172 page ![]() Document Number: 002-09305 Rev. *C Page 4 of 172 PRELIMINARY MB95F856K, MB95F866K, MB95F876K Block Diagram (MB95860K Series) Reset with LVD Dual operation Flash with security function (36 Kbyte) F2MC-8FX CPU RAM (1 Kbyte) Oscillator circuit CR oscillator Clock control Watch prescaler Watch counter On-chip debug Wild register External interrupt ch. 0 to ch. 7 Interrupt controller 8/16-bit composite timer ch. 0 8/16-bit composite timer ch. 1 UART/SIO ch. 0 I2C bus interface ch. 0 8/16-bit PPG ch. 0 Port Port PF2*1/RST*2 PF0/X0*2 PF1/X1*2 PG1/X0A*2 PG2/X1A*2 P02/INT02 P03/INT03 P05/INT05 P13/INT04 P15/INT00 P14/INT01 P46*1/INT06 P47*1/INT07 C (P13/UI0) (P14/UO0) (P15/UCK0) P06*3/PPG00 P07*3/PPG01 8/16-bit PPG ch. 1 P44*3/PPG10 P45*3/PPG11 8/10-bit A/D converter P04/AN00 (P05/AN01) (P06*3/AN02) (P07*3/AN03) (P44*3/AN06) (P45*3/AN07) (P47*1/SCL) (P46*1/SDA) P10*1/DBG (P10*1/EC0) (P44*3/TO00) (P45*3/TO01) (P02/TO10) (P03/TO11) P60/EC1 Comparator ch. 0 (P05/CMP0_N) (P06*3/CMP0_O) (P07*3/CMP0_P) Beep output unit (P04/BEEP) Touch sensor P64/S00 to P67/S03 P70/S04 to P73/S07 P63/AREF (P45*3/DIO04) (P04/DIO01) (P13/DIO02) (PG2/DIO03) (PG1/DIO04) (P44*3/DIO03) (P60/DIO00) Vcc Vss *1: P10, P46, P47 and PF2 are N-ch open drain pins. *2: Software select *3: P06, P07, P44 and P45 are high-current pins. Note: Pins in parentheses indicate that those pins are shared among different peripheral functions. |
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