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MB95F856K Datasheet(PDF) 80 Page - Cypress Semiconductor |
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MB95F856K Datasheet(HTML) 80 Page - Cypress Semiconductor |
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80 / 172 page ![]() Document Number: 002-09305 Rev. *C Page 80 of 172 PRELIMINARY MB95F856K, MB95F866K, MB95F876K 14.2.2 Port 1 Port 1 is a general-purpose I/O port. This section focuses on its functions as a general-purpose I/O port. For details of peripheral functions, refer to their respective chapters in “New 8FX MB95850K/860K/870K Series Hardware Manual”. 1. Port 1 configuration ■ Port 1 is made up of the following elements. ❐ General-purpose I/O pins/peripheral function I/O pins ❐ Port 1 data register (PDR1) ❐ Port 1 direction register (DDR1) ❐ Port 1 pull-up register (PUL1) 2. Block diagrams of port 1 ■ P10/DBG/EC0 pin This pin has the following peripheral functions: ❐ DBG input pin (DBG) ❐ 8/16-bit composite timer ch. 0 clock input pin (EC0) ■ Block diagram of P10/DBG/EC0 ■ P13/INT04/UI0/DIO02 pin This pin has the following peripheral functions: ❐ External interrupt input pin (INT04) ❐ UART/SIO ch. 0 data input pin (UI0) ❐ TS direct output ch. 2 pin (DIO02) PDR1 Pin PDR1 read PDR1 write Executing bit manipulation instruction DDR1 read DDR1 write DDR1 0 1 Stop mode, watch mode (SPL = 1) OD Hysteresis Peripheral function input |
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