MB95F856K datasheet(95/172 Pages) CYPRESS

95 / 172 page

Document Number: 002-09305 Rev. *C

Page 95 of 172

PRELIMINARY

MB95F856K, MB95F866K,

MB95F876K

4. Port F operations

■ Operation as an output port

❐ A pin becomes an output port if the bit in the DDRF register corresponding to that pin is set to “1”.

❐ For a pin shared with other peripheral functions, disable the output of such peripheral functions.

❐ When a pin is used as an output port, it outputs the value of the PDRF register to external pins.

❐ If data is written to the PDRF register, the value is stored in the output latch and is output to the pin set as an output port as it is.

❐ Reading the PDRF register returns the PDRF register value.

■ Operation as an input port

❐ A pin becomes an input port if the bit in the DDRF register corresponding to that pin is set to “0”.

❐ For a pin shared with other peripheral functions, disable the output of such peripheral functions.

❐ If data is written to the PDRF register, the value is stored in the output latch but is not output to the pin set as an input port.

❐ Reading the PDRF register returns the pin value. However, if the read-modify-write (RMW) type of instruction is used to read the

PDRF register, the PDRF register value is returned.

■ Operation at reset

If the CPU is reset, all bits in the DDRF register are initialized to “0” and port input is enabled.

■ Operation in stop mode and watch mode

❐ If the pin state setting bit in the standby control register (STBC:SPL) is set to “1” and the device transits to stop mode or watch

mode, the pin is compulsorily made to enter the high impedance state regardless of the DDRF register value. The input of that

pin is locked to “L” level and blocked in order to prevent leaks due to input open.

❐ If the pin state setting bit is “0”, the state of the port I/O or that of the peripheral function I/O remains unchanged and the output

level is maintained.

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