COP404C datasheet(17/18 Pages) NSC

17 / 18 page

Emulation (Continued)

When ADDATA turns off the EPROM is enabled and the

IP7 – IP0 pins will input the memory data A10 A9 and A8

output the most significant address bits to the memory

(SKIP output may be used for program debug if needed)

CKI is divided by 4 Other divide-by are emulated by ex-

ternal divider

CKO can be emulated as a general purpose input by us-

ing CKOI or as a Halt IO port by using CKOH

MB pin can be pulled low if the MICROBUS feature of the

COP444C and COP424C is needed Othewise it should

be high

DUAL pin can be pulled low if the Dual-Clock feature of

the COP444C and COP424C is needed Otherwise it

should be high

The SEL10 and SEL20 inputs are used to emulate the

COP444C445C COP424C425C or COP410C411C

When emulating the COP444C445C the user must

configure SEL20e1 and SEL10e1

When emulating the COP424C425C the user must

configure SEL20e0 and SEL10e1 In this mode the

user RAM is physically halved As in the COP424C

425C the user has 64 digits (256 bits) of RAM avail-

able Pin A10 should not be connected to the program

memory (most significant address bit of the program

memory should be grounded if using a 2kc8 memory)

When emulating the COP410C411C the user must

configure SEL20e0 and SEL10e0 In this mode the

user has 32 digits (128 bits) of RAM available orga-

nized in the same way as the COP410C411C - 4 regis-

ters of 8 digits each Pins A10 and A9 should not be

connected to the program memory (the 2 most signifi-

cant address bits of the program memory should be

grounded)

Furthermore the subroutine stack is decreased from 3

levels to 2 levels

The pins SEL10 and SEL20 change the internal logic of the

device to accurately emulate the devices as indicated

above

However

the user must remember that the

COP424C425C is a subset of the COP444CCOP445C

with respect to memory size The COP410C411C is a sub-

set both in memory size and in function The user must take

care not to use features and instructions which are not avail-

able on the COP410C411C (see table IV below) when us-

ing the COP404C to emulate the COP410C411C

TABLE IV FEATURES AND INSTRUCTIONS NOT

AVAILABLE ON COP410C411C

Timer

ADT

Dual-clock

CASC

Interrupt

CAMT

Microbus

CTMA

LDD

XAD

(except 3

15)

XABR

SKT

ININ

INIL

OGI

Option Table

COP404C MASK OPTIONS

The following COP444C options have been implemented in the COP404C

Option value

Comment

Option 1e0

Ground Pin

no option available

Option 2e1 2

CKO is replaced by CKOI and CKOH

Option 3e5

CKI is external clock input divided by 4

Option 4e1

RESET is Hi-Z input

Option 5 – 8e0

L outputs are standard TRI-STATE

Option 9e1

IN1 is a Hi-Z input

Option 10e1

IN2 is a Hi-Z input

Option 11e0VCC pin

no option available

Option 12 – 15e0

L outputs are standard TRI-STATE

Option 16e1

SI is a Hi-Z input

Option 17e0

SO is a standard output

Option 18e0

SK is a standard output

Option 19e1

IN0 is a Hi-Z input

Option 20e1

IN3 is a Hi-Z input

Option 21 – 24e1

G outputs are low-current

Option 25 – 28e0

D outputs are standard

Option 29e1

No internal initialization logic

Option 30e0 1

DUAL-CLOCK is pin selectable

Option 31e0

TIMER time-base counter

Option 32e0 1

MICROBUS is pin selectable

Option 33eNA

48-pin package

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