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COP404C Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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COP404C Datasheet(HTML) 11 Page - National Semiconductor (TI) |
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11 / 18 page  Instruction Set (Continued) TABLE III COP404C Instruction Set Hex Machine Skip Mnemonic Operand Code Language Data Flow Conditions Description Code (Binary) ARITHMETIC INSTRUCTIONS ASC 30 l0011l0000l AaCaRAM(B) x A Carry Add with Carry Skip on Carry x C Carry ADD 31 l0011l0001l AaRAM(B) x A None Add RAM to A ADT 4A l0011l0001l Aa1010 x A None Add Ten to A AISC y 5b l0101l y l Aay x A Carry Add Immediate Skip on Carry (y i 0) CASC 10 l0001l0000l AaRAM(B)aC x A Carry Compliment and Add with Carry x C Carry Skip on Carry CLRA 00 l0000l0000l 0 x A None Clear A COMP 40 l0100l0000l A x A None Ones complement of A to A NOP 44 l0100l0100l None None No Operation RC 32 l0011l0010l ‘‘0’’ x C None Reset C SC 22 l0010l0010l ‘‘1’’ x C None Set C XOR 02 l0000l0010l A Z RAM(B) x A None Exclusive-OR RAM with A TRANSFER OF CONTROL INSTRUCTIONS JID FF l1111l1111l ROM (PC108 AM) x PC70 None Jump Indirect (note 2) JMP a 6b l0110l0la108l a x PC None Jump l a70 l JP a l1l a60 l a x PC60 None Jump within Page (Note 3) (pages 23 only) or l11l a50 l a x PC50 (all other pages) JSRP a l10l a50 l PCa1 x SA x SB x SC None Jump to Subroutine Page 00010 xPC106 (Note 4) a x PC50 JSR a 6b l0110l1la108l PCa1 x SA x SB x SC None Jump to Subroutine l a70 l a x PC RET 48 l0100l1000l SC x SB x SA x PC None Return from Subroutine RETSK 49 l0100l1001l SC x SB x SA x PC Always Skip Return from Subroutine on Return then Skip HALT 33 l0011l0011l None HALT processor 38 l0011l1000l IT 33 l0011l0011l IDLE till timer 39 l0011l1001l None overflows then continues MEMORY REFERENCE INSTRUCTIONS CAMT 33 l0011l0011l A x T74 3F l0011l1111l RAM(B) x T30 None Copy A RAM to T CTMA 33 l0011l0011l T744 x RAM(B) 2F l0010l1111l T30 x A None Copy T to RAM A CAMQ 33 l0011l0011l A x Q74 None Copy A RAM to Q 3C l0011l1100l RAM(B) xQ30 CQMA 33 l0011l0011l Q74 x RAM(B) None Copy Q to RAM A 2C l0010l1100l Q30 x A LD r b 5 l00l r l0101l RAM(B) x A None Load RAM into A (re03) Br Z r x Br Exclusive-OR Br with r LDD rd 23 l0010l0011l RAM(rd) x A None Load A with RAM pointed l0l r l d l to direct by rd LQID BF l1011l1111l ROM(PC108AM) x Q None Load Q Indirect (Note 2) SB x SC RMB 0 4C l0100l1100l 0 x RAM(B)0 None Reset RAM Bit 145 l0100l0101l 0 x RAM(B)1 242 l0100l0010l 0 x RAM(B)2 343 l0100l0011l 0 x RAM(B)3 11 |
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