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LTC4258 Datasheet(PDF) 16 Page - Linear Technology |
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LTC4258 Datasheet(HTML) 16 Page - Linear Technology |
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16 / 28 page ![]() LTC4258 16 4258p measures the port voltage through the DETECT n pin. Note that class 4 is presently specified by the IEEE as reserved for future use. Figure 13 shows a PD load line, starting with the shallow slope of the 25k signature resistor below 10V, then drawing the classification current (in this case, class 3) between 14.5V and 20.5V. The LTC4258’s load line for clas- sification is also shown in Figure 13. It has low impedance until current limit at 65mA (typ). The LTC4258 will classify a port immediately after a successful detection cycle in Semiauto or Auto modes, or when commanded to in Manual mode. It measures the PD classification signature current by applying 18V (typ) to the port and measuring the resulting current. It reports the detected class in the Class Status bits in the correspond- ing Port Status register. Note that in Auto mode, the port will power up regardless of which class is detected. The classification circuitry is disabled when the port is in Shutdown mode, powered up, or the corresponding Class Enable bit is cleared. Gate Currents Once the decision has been made to turn on power to a port, the LTC4258 uses a 50 µA current source to pull up on the GATE pin. Under normal power-up circumstances, the MOSFET gate will charge up rapidly to VT (the MOSFET threshold voltage), the MOSFET current will rise quickly to the current limit level and the GATE pin will be servoed to maintain the proper IINRUSH charging current. When out- put charging is complete, the MOSFET current will fall and the GATE pin will be allowed to continue rising to fully enhance the MOSFET and minimize its on resistance. The final VGS is nominally 13V. When a port is turned off, a 50 µA current source pulls down on the GATE pin, turning the MOSFET off in a controlled manner. No External Capacitors No external capacitors are required on the GATE pins for active current limit stability, lowering part count and cost. This also allows the fastest possible turn-off under severe overcurrent conditions, providing maximum safety and protection for the MOSFETs, load devices and board traces. Connecting capacitors to the external MOSFET gates can adversely affect the LTC4258’s ability to respond to a shorted port. Inrush Control The 802.3af standard lists two separate maximum current limits, ILIM and IINRUSH. Because they have identical val- ues, the LTC4258 implements both as a single current limit using VLIM (described below). Their functions are differentiated through the use of tICUT and tSTART, respec- tively (see tICUT Timing and tSTART Timing sections). To maintain consistency with the standard, the IINRUSH term is used when referring to an initial tSTART power-up event. When the LTC4258 turns on a port, it turns on the MOSFET by pulling up on the gate. The LTC4258 is designed to power up the port in current limit, limiting the inrush current to IINRUSH. The port voltage will quickly rise to the point where the PD reaches its input turn-on threshold and begins to draw current to charge its bypass capacitance, slowing the rate of port voltage increase. APPLICATIO S I FOR ATIO Figure 13. PD Classification VOLTAGE (VCLASS) 0 60 50 40 30 20 10 0 510 15 20 4258 F13 25 TYPICAL CLASS 3 PD LOAD LINE 48mA 33mA PSE LOAD LINE 23mA 14.5mA 6.5mA CLASS 4 CLASS 2 CLASS 1 CLASS 0 CLASS 3 OVER CURRENT POWER CONTROL The primary function of the LTC4258 is to control the delivery of power to the PSE port. It does this by control- ling the gate drive voltage of an external power MOSFET while monitoring the current via a sense resistor and the output voltage at the OUT pin. This circuitry serves to couple the raw isolated –48V input supply to the port in a controlled manner that satisfies the PD’s power needs while minimizing disturbances on the –48V backplane. |
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