LTM4609 datasheet(27/38 Pages) LINER

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LTM4636-1

46361fa

For more information www.linear.com/LTM4636-1

APPLICATIONS INFORMATION

input voltage will source very large currents to ground

throughthefailedinternaltopMOSFETandenabledinternal

bottom MOSFET. This can cause excessive heat and board

damage depending on how much power the input voltage

can deliver to this system. A fuse or circuit breaker can be

used as a secondary fault protector in this situation. The

LTM4636-1hastheenhancedovertemperatureprotection

discussedearlierandschematicapplicationswillbeshown

at the end of the data sheet.

Layout Checklist/Example

The high integration of the LTM4636-1 makes the PCB

board layout very simple and easy. However, to optimize

its electrical and thermal performance, some layout

considerations are still necessary.

• Use large PCB copper areas for high current paths,

including VIN, GND and VOUT. It helps to minimize the

PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output

capacitors next to the VIN, GND and VOUT pins to

minimize high frequency noise.

• Place a dedicated power ground layer underneath the

unit.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between top layer and other power layers.

• Do not put vias directly on the pad, unless they are

capped or plated over.

• Place test points on signal pins for testing.

• Use a separated SGND ground copper area for

components connected to signal pins. Connect the

SGND to GND underneath the unit.

• Forparallelmodules,tietheCOMPandVFBpinstogether.

Use an internal layer to closely connect these pins

together.

• Add RSNUB (2.2 ) and CSNUB (2200pF) to dampen

switch ringing.

Figure19givesagoodexampleoftherecommendedlayout.

Figure 19. Recommended PCB Layout

VOUT

COUT1

CIN2

CIN1

CIN4

CIN3

COUT2

VOUT

GND

TEMP SENSE

GND

46361 F19

VIN

GND

10 11 12

COUT3 COUT4

RFREQ

RSNUB

0805

CSNUB

0603

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