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LTM8049 Datasheet(PDF) 9 Page - Linear Technology

Part # LTM8049
Description  EN55022B Compliant 58V, 4A Step-Down DC/DC 關Module Regulator
PDF  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM8049 Datasheet(HTML) 9 Page - Linear Technology

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LTM4653
9
Rev 0
For more information www.analog.com
PGOOD (D1): Power Good Indicator, Open-Drain Output
Pin. PGOOD is high impedance when PGDFB is within
approximately ±7.5% of 0.6V. PGOOD is pulled to GND
when PGDFB is outside this range.
PGDFB (D2): Power Good Feedback Programming Pin.
Connect PGDFB to VOSNS through a resistor, RPGDFB.
RPGDFB configures the voltage threshold of VOUT for which
PGOOD toggles its state. If the PGOOD feature is used,
set RPGDFB to:
RPGDFB =
VOUT
0.6V
– 1
⎛
⎝
⎜
⎞
⎠
⎟ • 4.99k
otherwise, leave PGDFB open circuit.
A small filter capacitor (220pF) internal to the LTM4653
on this pin provides high frequency noise immunity for
the PGOOD output indicator.
fSET (E3): Oscillator Frequency Programming Pin. The
default switching frequency of the LTM4653 is 400kHz.
Often, it is necessary to increase the programmed fre-
quency by connecting a resistor between fSET and SGND.
(See the Applications Information section.) Note that the
synchronization range of CLKIN is approximately ±40%
of the oscillator frequency programmed by the fSET pin.
CLKIN (B1): Mode Select and Oscillator Synchronization
Input. Leave CLKIN open circuit for forced continuous
mode operation. Alternatively, this pin can be driven to
synchronize the switching frequency of the LTM4653 to
a clock signal. In this condition, the LTM4653 operates
in forced continuous mode and the cycle-by-cycle turn-
on of the primary power MOSFET MT is coincident with
the rising edge of the clock applied to CLKIN. Note the
synchronization range of CLKIN is approximately ±40%
of the oscillator frequency programmed by the fSET pin.
(See the Applications Information section.)
COMPa (E2): Current Control Threshold and Error Ampli-
fier Compensation Node. The trip threshold of LTM4653’s
current comparator increases with a corresponding rise
in COMPa voltage. A small filter cap (10pF) internal to the
LTM4653 on this pin introduces a high-frequency roll-
off of the error-amplifier response, yielding good noise
rejection in the control-loop. COMPa is often electrically
connected to COMPb in one’s application, thus applying
default loop compensation. Loop compensation (a series
resistor-capacitor) can be applied externally to COMPa if
desired or needed, instead. (See COMPb.)
COMPb (E1): Internal Loop Compensation Network. For
mostapplications,theinternal,defaultloopcompensation
of the LTM4653 is suitable to apply “as is”, and yields very
satisfactoryresults:applythedefaultloopcompensationto
the control loop by simply connecting COMPa to COMPb.
When more specialized applications require a personal
touch to the optimization of control loop response, this
can be accomplished by connecting a series resistor-
capacitor network from COMPa to SGND—and leaving
COMPb open circuit.
VINREG (D3): Input Voltage Regulation Programming
Pin. Optionally connect this pin to the midpoint node
formed by a resistor-divider between VD and SGND. When
the voltage on VINREG falls below approximately 2V, a
VINREG control loop servos VOUT to decrease the power
inductor current and thus regulate VINREG at 2V. (See
the Applications Information section.)
If this input voltage regulation feature is not desired, con-
nect VINREG to INTVCC.
IMONa (C2): Power Inductor Current Analog Indicator Pin
and Current Limit Programming Pin. The current flowing
out of this pin is equal to 1/40,000 of the average power
inductor current. To construct a voltage (VIMONa) that is
proportional to the power inductor current, optionally
apply a parallel resistor-capacitor network to this pin and
terminate it to SGND.
IMONa can be connected to IMONb if the default resis-
tor-capacitor termination network provided by IMONb is
desired: 1V at full scale (4A) load current. (See IMONb.)
If this analog indicator feature is not desired, connect
IMONa to SGND.
If IMONa ever exceeds a trip threshold of approximately
2V, an IMON control loop servos VOUT to decrease power
inductor current and thus regulate IMONa at 2V. In this
manner, the average current limit inception threshold of
the LTM4653 can be configured. (See the Applications
Information section.)
PIN FUNCTIONS



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