KMB-001LEVALZ datasheet(28/34 Pages) RENESAS

28 / 34 page

ISLA214P12

FN7982 Rev 2.00

Page 28 of 34

June 27, 2012

ADDRESS 0XC1: USER_PATT1_LSB

ADDRESS 0XC2: USER_PATT1_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 1.

ADDRESS 0XC3: USER_PATT2_LSB

ADDRESS 0XC4: USER_PATT2_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 2

ADDRESS 0XC5: USER_PATT3_LSB

ADDRESS 0XC6: USER_PATT3_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 3

ADDRESS 0XC7: USER_PATT4_LSB

ADDRESS 0XC8: USER_PATT4_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 4.

ADDRESS 0XC9: USER_PATT5_LSB

ADDRESS 0XCA: USER_PATT5_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 5.

ADDRESS 0XCB: USER_PATT6_LSB

ADDRESS 0XCC: USER_PATT6_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 6.

ADDRESS 0XCD: USER_PATT7_LSB

ADDRESS 0XCE: USER_PATT7_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 7.

ADDRESS 0XCF: USER_PATT8_LSB

ADDRESS 0XD0: USER_PATT8_MSB

These registers define the lower and upper eight bits,

respectively, of the user-defined pattern 8.

ADDRESS 0XFE: OFFSET/GAIN_ADJUST_ENABLE

Bit 0 at this register must be set high to enable adjustment of

offset coarse and fine adjustments (0x20 and 0x21) and gain

medium and gain fine adjustments(0x23 and 0x24). It is

recommended that new data be written to the offset and gain

adjustment registers (0x20, 0x21, 0x23, 0x24) while Bit 0 is a

‘0’. Subsequently, Bit 0 should be set to ‘1’ to allow the values

written to the aforementioned registers to be used by the ADC.

Bit 0 should be set to a ‘0’ upon completion.

TABLE 13. OUTPUT TEST MODES

VALUE

0xC0[7:4]

OUTPUT TEST MODE

WORD 1

WORD 2

0000

Off

0001

Midscale

0x8000

N/A

0010

Positive Full-Scale

0xFFFF

N/A

0011

Negative Full-Scale

0x0000

N/A

0100

SDR/DDR Dependent

N/A

0101

Reserved

N/A

0110

Reserved

N/A

0111

SDR/DDR Dependent

N/A

1000

User Pattern

user_patt1

user_patt2

1001

Reserved

N/A

1010

Ramp

N/A

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