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LPC81xM Datasheet(PDF) 37 Page - NXP Semiconductors

Part # LPC81xM
Description  32-bit ARM짰 Cortex짰-M0 microcontroller
PDF  78 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC81xM Datasheet(HTML) 37 Page - NXP Semiconductors

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LPC81XM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 4.6 — 4 April 2018
37 of 78
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
11.1 Power consumption
Power measurements in Active, Sleep, Deep-sleep,and Power-down modes were
performed under the following conditions:
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIO DIR register.
• Write 1 to the GPIO CLR register to drive the outputs LOW.
Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL =0x1F); all peripheral
clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.
1 MHz - 6 MHz: IRC enabled; PLL disabled.
12 MHz: IRC enabled; PLL disabled.
24 MHz: IRC enabled; PLL enabled.
30 MHz: IRC disabled; SYSOSC enabled; PLL enabled.
Fig 14. Active mode: Typical supply current IDD versus supply voltage VDD



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