November 22, 2004

20

Philips Semiconductors

Preliminary specification

Universal LCD driver

for low multiplex rates

PCF8562

which is followed by one of two possible PCF8562 slave addresses available. All PCF8562s whose SA0 inputs

by all PCF8562s whose SA0 inputs are set to the alternative level.

After an acknowledgement, one or more command bytes follow which define the status of the PCF8562.

The last command byte sent is identified by resetting its most significant bit, continuation bit C, (see Fig.17). The

command bytes are also acknowledged by all addressed PCF8562s on the bus.

After the last command byte, one or more display data bytes may follow. Display data bytes are stored in the display

RAM at the address specified by the data pointer and the subaddress counter. Both data pointer and subaddress counter

are automatically updated.

An acknowledgement after each byte is asserted only by PCF8562s that are addressed via address lines A0, A1 and A2.

7.8

Command decoder

bit C in their most significant bit position as shown in Fig.17. When this bit is set, it indicates that the next byte of the

transfer to arrive will also represent a command. If this bit is reset, it indicates that the command byte is the last in the

transfer. Further bytes will be regarded as display data.

The five commands available to the PCF8562 are defined in Table 4.

Fig.12 Bit transfer.

MBA607

data line

stable;

data valid

change

of data

allowed

SDA

SCL