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LTC6948 Datasheet(PDF) 22 Page - Analog Devices

Part # LTC6948
Description  Fractional-N Synthesizer Integrated VCO
PDF  38 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC6948 Datasheet(HTML) 22 Page - Analog Devices

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LTC6948
22
6948fa
For more information www.linear.com/LTC6948
operaTion
(Addr0) and an LSB of 0 indicating a write. The next byte is
the data intended for the register at address Addr0. CS is
then taken high to terminate the transfer. The first byte of
the second burst contains the destination register address
(Addr1) and an LSB indicating a write. The next byte on
SDI is the data intended for the register at address Addr1.
CS is then taken high to terminate the transfer.
Multiple Byte Transfers
More efficient data transfer of multiple bytes is accom-
plished by using the LTC6948’s register address auto-
increment feature as shown in Figure 11. The serial port
master sends the destination register address in the first
byteanditsdatainthesecondbyteasbefore,butcontinues
sending bytes destined for subsequent registers. Byte 1’s
address is Addr0+1, Byte 2’s address is Addr0+2, and so
on. If the register address pointer attempts to increment
past 14 (h0E), it is automatically reset to 0.
An example of an auto-increment read from the part is
shown in Figure 12. The first byte of the burst sent from
the serial bus master on SDI contains the destination reg-
ister address (Addr0) and an LSB of 1 indicating a read.
Once the LTC6948 detects a read burst, it takes SDO out
of the Hi-Z condition and sends data bytes sequentially,
beginning with data from register Addr0. The part ignores
all other data on SDI until the end of the burst.
Figure 9. Serial Port Read Sequence
Figure 10. Serial Port Single Byte Write
Figure 11. Serial Port Auto-Increment Write
Figure 12. Serial Port Auto-Increment Read
A6 A5 A4 A3 A2
7-BIT REGISTER ADDRESS
Hi-Z
Hi-Z
A1 A0 1
D7
X
D6 D5 D4 D3 D2 D1 D0 DX
8 BITS OF DATA
1 = READ
6948 F09
MASTER–CS
MASTER–SCLK
MASTER–SDI
LTC6948–SDO
16 CLOCKS
ADDR0 + Wr
Hi-Z
MASTER–CS
MASTER–SDI
LTC6948–SDO
BYTE 0
ADDR1 + Wr
BYTE 1
6948 F10
ADDR0 + Wr
Hi-Z
MASTER–CS
MASTER–SDI
LTC6948–SDO
BYTE 0
BYTE 1
BYTE 2
6948 F11
ADDR0 + Rd
DON’T CARE
Hi-Z
Hi-Z
MASTER–CS
MASTER–SDI
LTC6948–SDO
6948 F12
BYTE 0
BYTE 1
BYTE 2



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