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IC-PI Datasheet(PDF) 41 Page - IC-Haus GmbH

Part # IC-PI
Description  PROGRAMMABLE 12-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
PDF  49 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-PI Datasheet(HTML) 41 Page - IC-Haus GmbH

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preliminary
preliminary
iC-PI PROGRAMMABLE 12-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Rev B1, Page 41/48
REVERSE POLARITY PROTECTION
iC-PI is protected against a reversal of the supply volt-
age and has short-circuit-proof, error-tolerant output
drivers. A defective device cable or one wrongly con-
nected is tolerated by iC-PI. All circuitry components
which draw the monitored supply voltage from VDDS
and GNDS are also protected.
The following pins are also reverse polarity protected:
PA, NA, PB, NB, PZ, NZ, ERR, VDD, GND and ACO.
Conditions: This is based on the condition that GNDS
only receives load currents from VDDS. The maximum
voltage difference between GNDS and another pin
should not exceed 6 V (respectively 8 V for pin ERR).
Note: If iC-PI detects reverse polarity on power up,
the line drivers will not be enabled.
If the state of reverse polarity is resolved, iC-PI re-
boots from the EEPROM and enables the line drivers.
APPLICATION NOTES: SIGNAL CONDITIONING
The precise setting of the signal conditioning unit for
correction of the analog input signals is essential to the
result of interpolation; the absolute angle error obtained
determines the minimum signal jitter. Here, the effect
on the transition distance of the A/B output signals is
not always the same but instead dependent on the ab-
solute phase angle of the input signals. The following
gives an example for an interpolation factor of 100, i.e.
400 edges per sine period.
The offset error in the cosine signal has the strongest
effect on the absolute angle error at 90° and 270°; at
0° and 180° its influence on the transition distance is
the most marked. With a range setting of OR1 = OR2 =
00 and VOS12 = 01 (selects V05 of 500 mV) the offset
error can be compensated in increments of 0.5 mV. If
the offset has been compensated for incorrectly by one
step (1 LSB), the absolute angle error would increase
by approx. 0.06° and the transition distance vary by
approximately ± 0.1 %. Similar conditions apply to the
sine signal, with the sole difference that the maxima
would be shifted by 90°.
An error in amplitude has the strongest effect on the
absolute angle error at 45°, 135°, 225° and 315°; the
biggest change in the transition distance can be ob-
served at 0°, 90°, 180° and 270°. iC-PI can compensate
for the amplitude ratio in steps of approx. 0.1 % so that
incorrect compensation by 1 LSB would increase the
absolute angle error by approx. 0.06°. The transition
distance would then vary by ± 0.1 %.
A phase error between the sine and cosine signals (a
deviation in phase shift from the ideal 90°) has the most
marked influence on the absolute angle error at 0°, 90°,
180° and 270°. The greatest effect on the transition
distance is noted at 45°, 135°, 225° and 315°. iC-PI’s
phase correction feature permits a step size of 0.02° so
that incorrect compensation by 1 LSB would increase
the absolute angle error by approx. 0.02°. The transi-
tion distance would then vary by ± 0.03 %.
In a perfect signal conditioning procedure it can be
assumed that the residual error constitutes half a com-
pensation step. With this, in theory iC-PI would achieve
an absolute angle accuracy of approx. 0.03°, with the
transition distance varying by approx. ± 0.05 %. Addi-
tionally, the linearity error of the interpolator must also
be taken into consideration; this increases the absolute
angle error by approx. 0.13° and the variation in tran-
sition distance by approx. 0.5 % (refer to the Electrical
Characteristics No. 302, and 304 for further ratings).
MODE(3:0)
Addr. 0x02; bit 3:0
Code
Operating Mode
Pin PA
Pin NA
Pin PB
Pin NB
Pin PZ
Pin NZ
Pin ERR
0x00
ABZ
A+
A-
B+
B-
Z+
Z-
ERR
0x0E
UVW
A+
U
B+
V
Z+
W
ERR
0x01
Calibration 1
res.
res.
res.
IBN*
PCH0
NCH0
res.
0x02
Calibration 2
PCH1
NCH1
PCH2
NCH2
VDC1
VDC2
res.
0x0B
System Test**
A4
A8
B4
B8
ZIn
TP1
ERR
*) Outputs must be active and not tristate (see note on page 20).
**) Additional parameter settings are required, see page 22, Table 20.
Table 70: Selected operating modes and test signals.



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