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IC-PI Datasheet(PDF) 29 Page - IC-Haus GmbH |
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IC-PI Datasheet(HTML) 29 Page - IC-Haus GmbH |
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29 / 49 page ![]() preliminary preliminary iC-PI PROGRAMMABLE 12-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER Rev B1, Page 29/48 SIGNAL CONDITIONING CH0 Input Mode CH0 DUAL configures the channel CH0 to process either analog or digital input signals. DUAL Addr. 0x07, bit 7 Code Mode 0x0 Analog input function 0x1 2-bit digital input function Table 32: Dual Input Mode When the inputs are configured to analog (DUAL = 0), the gain and offset signal conditioning parameters de- scribed further below are operational. When configured for digital signals (DUAL = 1), the in- puts X1 (for PCH0) and X2 (for NCH0) evaluate a 2-bit Gray-coded multiturn signal. Using this code, the re- peated signal cycles generated by a magnetoresistive angle sensor or an optical polarization sensor can be distinguished. To do so, iC-PI interprets the upper bit on X1 (PCH0) as period information, and uses the lower bit on X2 (NCH0) to synchronize the multiturn information to the internal angle position derived form the sine/cosine signals of CH1 and CH2. Gain Settings CH0 For analog input mode (DUAL = 0), the test signals required to calibrate the zero channel are available in mode Calibration 1. Additionally, the relative phase of the ungated zero sig- nal ZIn compared to A and B can be determined in mode System Test. The CH0 gain is set using the following steps: 1. The signal level control is to be shut down and the constant current source for the ACO output is set to the same values as during the calibration of CH1 and CH2 (registers ACOT, ACOR and ACOS). 2. The coarse gain is to be selected so that a differential signal amplitude of approx. 1 Vpp is produced internally (signal PCH0 to NCH0). 3. GF0 then permits fine gain adjustment to 1 Vpp. The total gain is GR0 x GF0. R0 Nx GND Px 0.25 Vp 1 Vpp 0.25 Vp V pk(Nx) V pk(Px) V peak-to-peak Calibration 1 iC-PI Figure 15: Definition of 1 Vpp differential test sig- nal. Note that the outputs should not be loaded during Test and Calibration modes (R0 must be high resistance). Note: Using mode Test 5 is not recommended, as the CH0 outputs are not buffered. GR0 Addr. 0x07, bit 6:4 Code Factor with input voltage divider (R0 = 0x9) Factor w/o input voltage divider (R0 ̸= 0x9) 0x0 0.5 2.0 0x1 1.0 4.1 0x2 1.3 5.3 0x3 1.7 6.7 0x4 2.2 8.7 0x5 2.6 10.5 0x6 3.3 13.2 0x7 4.0 16.0 Notes The effective total gain is calculated using: G0eff = GF0 x GR0, or G0eff = 1/4 x GF0 x GR0 if using the input voltage divider (R0 = 0x9). Table 33: Coarse Gain Factor CH0 GF0 Addr. 0x08, bit 4:0 Code Factor 0x00 1.00 0x01 1.06 ... 6.25 GF0 31 0x1F 6.25 Table 34: Fine Gain Factor CH0 |
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