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LTC4216

4216f

For example if C

V ms and

Vms

SS NOM

SS SLOW

()

210

After the initial timing cycle, the SS capacitor is charged

by a 10µA current source pull-up and GATE is held low

by the ACL ampliﬁer. As SS ramps up, the ACL ampliﬁer

releases the GATE when it crosses its input offset volt-

age. At this instant, SS switches the pull-up current from

10µA to 1µA for a slower ramp rate. GATE continues to

charge up with 20µA pull-up before the MOSFET reaches

its turn-on threshold voltage. When the external MOSFET

is ﬁrst turned on, there is always a current step due to the

high gain of the MOSFET. The slower SS ramp rate allows

the gate of the external MOSFET to be turned on with a

smaller inrush current step.

When the external MOSFET is turned on, load current starts

to ﬂow through the sense resistor, developing a voltage drop

across it. This allows the ACL ampliﬁer to servo the GATE

to the voltage across the sense resistor, thus controlling

the rate of change of the inrush current. At this instant, SS

switches back from 1µA to 10µA current source pull-up

for a normal ramp rate. GATE continues to ramp up as

the ACL ampliﬁer servos to track the SS ramp rate. At the

end of SS ramp-up when SS reaches its ﬁnal value, GATE

is servoed to ΔVACL(TH) across the sense resistor. If the

voltage across the sense resistor drops below ΔVACL(TH)

due to a falling load current, the ACL ampliﬁer shuts off

and GATE ramps further by a 20µA pull-up.

SS is pulled low under any of the following conditions:

in VCC undervoltage lockout condition, during the ﬁrst

timing cycle or when the circuit breaker fault times out.

If the soft-start function is not used, leave the SS pin

unconnected.

Inrush Control with GATE Capacitor

For applications not requiring soft-start to control the

di/dt of the inrush current during power-up, an alternative

way to limit the inrush is to control the GATE pin voltage

slew rate by connecting an external capacitor, C4, from

the GATE pin to ground, as shown in Figure 7. The GATE

slew rate is given by:

GATE

(7)

where CGATE is the associated parasitic GATE capacitance

due to the external MOSFET’s gate input capacitance,

CISS.

The inrush current ﬂowing into the load capacitor, CLOAD,

is limited to:

INRUSH

LOAD

GATE

LOAD

GATE

••

(8)

For example, if CLOAD = 4700µF, C4 = 33nF and CGATE =

5nF, IINRUSH = 2.5A.

If CLOAD is very large and IINRUSH exceeds the analog

current limit, the GATE is servoed to control the inrush

current to ΔVACL(TH)/RSENSE.

One limitation with this technique is that it slows down

the system turn-on and turn-off time by adding a capaci-

tor at the GATE pin. Should this technique be used, C4 ≤

50nF is recommended. However, having an external gate

capacitor helps to eliminate voltage spikes coupled through

the MOSFET’s drain-to-gate capacitance to the GATE pin

when the supply power is ﬁrst applied.

Figure 7. Inrush Control with External Gate Capacitor

SENSEP SENSEN GATE

**ADDITIONAL DETAILS

OMITTED FOR CLARITY

LTC4216**

RSENSE

VIN

VOUT

CLOAD

4216 F07

APPLICATIO S I FOR ATIO

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