27 / 64 page
Ultra37000 CPLD Family
Document #: 38-03007 Rev. *D
Page 27 of 64
CY37384
CY37512
Typical 5.0V Power Consumption (continued)
0
50
100
150
200
250
300
350
400
450
500
0
2 0
4 0
6 0
8 0
100
120
140
1 6 0
Fre q u e nc y (M H z )
Low P o w e r
Hig h S p e e d
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
VCC = 5.0V, TA = Room Temperature
0
100
200
300
400
500
600
0
2 0
4 0
6 0
8 0
100
120
140
160
Freque ncy (M H z )
Lo w P o w e r
Hig h S p e e d
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
VCC = 5.0V, TA = Room Temperature
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
