SM320VC33 datasheet(24/54 Pages) TI

24 / 54 page

SM320VC33, SMJ320VC33

DIGITAL SIGNAL PROCESSOR

SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251-1443

electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)†

PARAMETER

TEST CONDITIONS‡

MIN

TYP§

MAX

UNIT

VOH

High-level output voltage

DVDD = MIN,

IOH = MAX

2.4

VOL

Low-level output voltage

DVDD = MIN,

IOL = MAX

0.4

High-impedance current

TC = 25°C,

DVDD = MAX

-5

µA

Input current

TC = 25°C,

VI = VSS to DVDD

-5

µA

IIPU

Input current (with internal pullup)

Inputs with internal pullups¶

-600

µA

IIPD

Input current (with internal pulldown)

Inputs with internal pulldowns¶

600

-10

µA

IBKU

Input current (with bus keeper) pullup#

Bus keeper opposes until conditions match

-600

µA

IBKD

Input current (with bus keeper) pulldown#

600

-10

µA

IDDD

Supply current, pins||

TC = 25°C,

fx = 75 MHz

DVDD = MAX

260

IDDC

Supply current, core CPU||

TC = 25°C,

fx = 75 MHz

CVDD = MAX

215

PLL enabled, oscillator enabled

IDD

IDLE2, Supply current, IDDD plus IDDC

PLL disabled, oscillator enabled

500

IDD

IDLE2, Supply current, IDDD plus IDDC

PLL disabled, oscillator disabled, FCLK = 0

µA

Input capacitance

All inputs except XIN

10*

Input capacitance

XIN

10*

Output capacitance

10*

* Not production tested

† All voltage values are with respect to VSS.

‡ For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.

§ For VC33, all typical values are at DVDD = 3.3, CVDD = 1.8 V, TC (case temperature) = 25°C.

¶ Pins with internal pullup devices: TDI, TCK, and TMS. Pin with internal pulldown device: TRST.

# Pins D0-D31 include internal bus keepers that maintain valid logic levels when the bus is not driven (see Figure 9).

|| Actual operating current is less than this maximum value. This value was obtained under specially produced worst-case test conditions, which

are not sustained during normal device operation. These conditions consist of continuous parallel writes of a checkerboard pattern at the

maximum rate possible. See TMS320C3x General-Purpose Applications (literature number SPRU194).

kfx is the PLL output clock frequency.

PARAMETER MEASUREMENT INFORMATION

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

Ω

Where:

IOL

= 4 mA (all outputs) for dc levels test.

IO and IOH are adjusted during ac timing analysis to achieve an ac termination of 50 Ω

VLOAD =DVDD/2

= 40-pF typical load-circuit capacitance

Figure 14. Test Load Circuit

SM320VC33 Datasheet(PDF) 24 Page - Texas Instruments

SM320VC33 Datasheet(HTML) 24 Page - Texas Instruments

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