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NT5CB128M8GP-EKB Datasheet(PDF) 44 Page - Nanya Technology Corporation. |
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NT5CB128M8GP-EKB Datasheet(HTML) 44 Page - Nanya Technology Corporation. |
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44 / 160 page  Version 2.2 44 Nanya Technology Cooperation © 04/2019 All Rights Reserved. NTC Proprietary Level: Property DDR3(L) 1Gb SDRAM NT5CB(C)128M8GN / NT5CB(C)64M16GP Timing detail of Write Leveling exit Extended Temperature Usage Nanya ’s DDR3(L) SDRAM supports the optional extended temperature range of 0°C to +95°C, TC. Thus, the SRT and ASR options must be used at a minimum. The extended temperature range DRAM must be refreshed externally at 2X (double refresh) anytime the case temperature is above +85°C (in supporting temperature range). The external refreshing requirement is accomplished by reducing the refresh period from 64ms to 32ms. However, self refresh mode requires either ASR or SRT to support the extended temperature. Thus either ASR or SRT must be enabled when TC is above +85°C or self refresh cannot be used until the case temperature is at or below +85°C. Mode Register Description Field Bits Description ASR MR2(A6) Auto Self-Refresh (ASR) When enabled, DDR3(L) SDRAM automatically provides Self-Refresh power management functions for all supported operating temperature values. If not enabled, the SRT bit must be programmed to indicate TOPER during subsequent Self-Refresh operation. 0 = Manual SR Reference (SRT) 1 = ASR enable SRT MR2(A7) Self-Refresh Temperature (SRT) Range If ASR = 0, the SRT bit must be programmed to indicate TOPER during subsequent Self-Refresh operation. If ASR = 1, SRT bit must be set to 0. 0 = Normal operating temperature range 1 = Extended operating temperature range CK CK T0 T1 Ta0 Tc0 Tc1 Tc2 Td1 Te1 CMD BA tIS tMOD tMRD ODT RTT_DQS_DQS DQS_DQS Result = 1 tWLO DQ RTT_Nom Td0 Te0 T2 Tb0 tAOFmin tAOFmax Transitioning Time Break Do not Care Undefined Driving Mode NOP NOP NOP NOP NOP NOP NOP MRS NOP Valid NOP Valid MR1 Valid Valid tODTLoff |
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