| Electronic Components Datasheet Search |
|
GPBA01B Datasheet(PDF) 5 Page - Generalplus Technology Inc. |
|
|
|||||||||||||||||||||||||||||
GPBA01B Datasheet(HTML) 5 Page - Generalplus Technology Inc. |
|
5 / 29 page ![]() GPBA01B © Generalplus Technology Inc. Proprietary & Confidential 5 MAY 28, 2007 Version: 1.1 5. SIGNAL DESCRIPTIONS Mnemonic History alias PIN No. Type Description CI PCI 17 I Cascade in for daisy chain CO PCO 16 O Cascade out for daisy chain AD7 - AD0 PD7 - PD0 4 - 11 I/O Multiplexing Address/Data bus(AD BUS) MC1, MC0 PMC1, PMC0 1, 2 I Input pins to indicate AD bus status P27( CE0 ) P26 - P20 XP27 - XP20 27 26 - 20 I/O P2 are short for P27-P20. Memory extender P27( CE0 ): Memory-0 chip-enable pin P26-P20: Memory offset address A[14:8]. I/O extender Input Mode: Pull-low internal Output Mode: Pure P17 - P10 XP17 - XP10 37 - 44 I/O P1 are short for P17-P10. Memory extender P17-P10: Memory offset address A[7:0]. I/O extender Input Mode: Pull-low internal Output Mode: Pure P07( CE1) P06( CE2 ) P05 - P00 XP07 - XP00 28 29 30 - 35 I/O P0 are short for P07-P00. Memory extender P07( CE1 ): Memory-1 chip-enable pin P06/( CE2 ): Memory-2 chip-enable pin P06-P00: Memory bank address B[6:0], GPBA01B support up to 128 banks, each bank is 32K bytes. I/O extender Input Mode: Pull-low internal Output Mode: Pure OSCO( OE ) PRDZ 18 O Memory extender OSCO( OE ): External memories output-enable signal I/O extender Output only: 1.84MHz oscillator output P55( WE ) PWRZ 19 O Memory extender P55( WE ): External memories write-enable signal I/O extender Output only control by B5 of $0023 XI XTAL1 12 I 1.84 MHz crystal input (20p capacitor required) XO XTAL2 13 O 1.84 MHz crystal output (20p capacitor required) CLKO ICLK 15 O Clock divider output VDD 36 I Positive supply VSS 3 I Ground reference DVP 14 I Test mode, please leave it open. Pull-low internal. Note1: Fully compatible with GPBA01A, expect DVP mode is discarded. Note2: There are built-in pull low resistors at all input and bi-direction pins except AD [7:0], MC0, MC1, CI. The pull low resistors of bi-direction pin are disabled when working in output mode. Note3: Internal pull-low resistor with value of approx. 37K Ohms @ VDD = 5.0V; 78K Ohms @ VDD = 3.0V. Note4: Generalplus strongly recommend user use Mnemonic name instead of History alias for easy understanding. Note5: Physical addresses are concatenated from {B [6:0], A [14:8], A [7:0]}. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |