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PIC18F44800TE/ML Datasheet(PDF) 477 Page - Microchip Technology |
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PIC18F44800TE/ML Datasheet(HTML) 477 Page - Microchip Technology |
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477 / 484 page  2004 Microchip Technology Inc. Preliminary DS39637A-page 475 PIC18F2480/2580/4480/4580 EECON1 (Data EEPROM Control 1) ................. 97, 106 HLVDCON (HLVD Control) ...................................... 267 INTCON (Interrupt Control) ...................................... 115 INTCON2 (Interrupt Control 2) ................................. 116 INTCON3 (Interrupt Control 3) ................................. 117 IPR1 (Peripheral Interrupt Priority 1) ........................ 124 IPR2 (Peripheral Interrupt Priority 2) ........................ 125 IPR3 (Peripheral Interrupt Priority 3) ................ 126, 317 MSEL0 (Mask Select 0) ........................................... 307 MSEL1 (Mask Select 1) ........................................... 308 MSEL2 (Mask Select 2) ........................................... 309 MSEL3 (Mask Select 3) ........................................... 310 OSCCON (Oscillator Control) .................................... 30 OSCTUNE (Oscillator Tuning) ................................... 27 PIE1 (Peripheral Interrupt Enable 1) ........................ 121 PIE2 (Peripheral Interrupt Enable 2) ........................ 122 PIE3 (Peripheral Interrupt Enable 3) ................ 123, 316 PIR1 (Peripheral Interrupt Request (Flag) 1) ............................................. 118 PIR2 (Peripheral Interrupt Request (Flag) 2) ............................................. 119 PIR3 (Peripheral Interrupt Request (Flag) 3) ..................................... 120, 315 RCON (Reset Control) ....................................... 42, 127 RCSTA (Receive Status and Control) ...................... 229 RXB0CON (Receive Buffer 0 Control) ..................... 287 RXB1CON (Receive Buffer 1 Control) ..................... 289 RXBnDLC (Receive Buffer n Data Length Code) .......................................... 292 RXBnDm (Receive Buffer n Data Field Byte m) ........................................... 292 RXBnEIDH (Receive Buffer n Extended Identifier, High Byte) ........................ 291 RXBnEIDL (Receive Buffer n Extended Identifier, Low Byte) ......................... 291 RXBnSIDH (Receive Buffer n Standard Identifier, High Byte) ......................... 290 RXBnSIDL (Receive Buffer n Standard Identifier, Low Byte) ......................... 291 RXERRCNT (Receive Error Count) ......................... 293 RXFBCONn (Receive Filter Buffer Control n) .......... 306 RXFCONn (Receive Filter Control n) ....................... 305 RXFnEIDH (Receive Acceptance Filter n Extended Identifier, High Byte) ........................ 303 RXFnEIDL (Receive Acceptance Filter n Extended Identifier, Low Byte) ......................... 303 RXFnSIDH (Receive Acceptance Filter n Standard Identifier Filter, High Byte) ................ 302 RXFnSIDL (Receive Acceptance Filter n Standard Identifier Filter, Low Byte) ................ 302 RXMnEIDH (Receive Acceptance Mask n Extended Identifier Mask, High Byte) .............. 304 RXMnEIDL (Receive Acceptance Mask n Extended Identifier Mask, Low Byte) ............... 304 RXMnSIDH (Receive Acceptance Mask n Standard Identifier Mask, High Byte) ............... 303 RXMnSIDL (Receive Acceptance Mask n Standard Identifier Mask, Low Byte) ................ 304 SDFLC (Standard Data Bytes Filter Length Count) ......................................... 305 SSPCON1 (MSSP Control 1, I2C Mode) ................. 198 SSPCON1 (MSSP Control 1, SPI Mode) ................. 189 SSPCON2 (MSSP Control 2, I2C Mode) ................. 199 SSPSTAT (MSSP Status, I2C Mode) ....................... 197 SSPSTAT (MSSP Status, SPI Mode) ...................... 188 Status ........................................................................ 88 STKPTR (Stack Pointer) ............................................ 63 T0CON (Timer0 Control) ......................................... 147 T1CON (Timer 1 Control) ........................................ 151 T2CON (Timer 2 Control) ........................................ 157 T3CON (Timer3 Control) ......................................... 159 TRISE (PORTE/PSP Control) ................................. 142 TXBIE (Transmit Buffers Interrupt Enable) .............. 318 TXBnCON (Transmit Buffer n Control) .................... 282 TXBnDLC (Transmit Buffer n Data Length Code) .......................................... 285 TXBnDm (Transmit Buffer n Data Field Byte m) ........................................... 284 TXBnEIDH (Transmit Buffer n Extended Identifier, High Byte) ........................ 283 TXBnEIDL (Transmit Buffer n Extended Identifier, Low Byte) ......................... 284 TXBnSIDH (Transmit Buffer n Standard Identifier, High Byte) ........................ 283 TXBnSIDL (Transmit Buffer n Standard Identifier, Low Byte) ......................... 283 TXERRCNT (Transmit Error Count) ........................ 285 TXSTA (Transmit Status and Control) ..................... 228 WDTCON (Watchdog Timer Control) ...................... 353 RESET ............................................................................. 391 Resets ....................................................................... 41, 343 Brown-out Reset (BOR) ........................................... 343 Oscillator Start-up Timer (OST) ............................... 343 Power-on Reset (POR) ............................................ 343 Power-up Timer (PWRT) ......................................... 343 RETFIE ............................................................................ 392 RETLW ............................................................................ 392 RETURN .......................................................................... 393 Return Address Stack ........................................................ 62 and Associated Registers .......................................... 62 Return Stack Pointer (STKPTR) ........................................ 63 Revision History ............................................................... 463 RLCF ............................................................................... 393 RLNCF ............................................................................. 394 RRCF ............................................................................... 394 RRNCF ............................................................................ 395 S SCK ................................................................................. 187 SDI ................................................................................... 187 SDO ................................................................................. 187 SEC_IDLE Mode ............................................................... 38 SEC_RUN Mode ................................................................ 34 Serial Clock, SCK ............................................................ 187 Serial Data In (SDI) .......................................................... 187 Serial Data Out (SDO) ..................................................... 187 Serial Peripheral Interface. See SPI Mode. SETF ............................................................................... 395 Slave Select (SS) ............................................................. 187 SLEEP ............................................................................. 396 Sleep OSC1 and OSC2 Pin States ...................................... 31 Sleep Mode ....................................................................... 37 Software Enabled BOR ...................................................... 44 Software Simulator (MPLAB SIM) ................................... 412 Software Simulator (MPLAB SIM30) ............................... 412 Special Event Trigger. See Compare (ECCP Mode). Special Event Trigger. See Compare (ECCP Module). Special Features of the CPU ........................................... 343 |
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