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TMS320VC5507ZAY Datasheet(PDF) 40 Page - Texas Instruments

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Part # TMS320VC5507ZAY
Description  TMS320VC5507 Fixed-Point Digital Signal Processor
PDF  139 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320VC5507ZAY Datasheet(HTML) 40 Page - Texas Instruments

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Functional Overview
40
April 2004 − Revised January 2008
SPRS244J
Table 3−5. External Bus Selection Register Bit Field Description (Continued)
BITS
DESCRIPTION
10
EMIF hold
HOLD = 0:
DSP drives the external memory bus
HOLD = 1:
Request the external memory bus to be placed in high-impedance so that another device can
drive the memory bus
9
EMIF hold acknowledge.
HOLDA = 0:
DSP indicates that a hold request on the external memory bus has occured, the EMIF
completed any pending external bus activity, and placed the external memory bus signals in
high-impedance state (address bus, data bus, CE[3:0], AOE, AWE, ARE, SDRAS, SDCAS,
SDWE, SDA10, CLKMEM). Once this bit is cleared, an external device can drive the bus.
HOLDA = 1:
No hold acknowledge
8
SDRAM CKE pin selection bit.
CKE SEL = 0: Use XF for SDRAM CKE signal
CKE SEL = 1: Use GPIO.4 for SDRAM CKE signal
7
SDRAM CKE enable bit.
CKE EN = 0:
XF or GPIO.4 operates in normal mode
CKE EN = 1:
Based on the CKE SEL bit, either XF or GPIO.4 drives the SDRAM CKE pin
6
SDRAM self-refresh command.
SR CMD = 0:
EMIF will not issue a SDRAM self-refresh command
SR CMD = 1:
EMIF will issue a SDRAM self-refresh command
5−2
Reserved. Must be kept as 0000 during any writes to EBSR.
1−0
Parallel port mode. EMIF/HPI/GPIO Mode. Determines the mode of the parallel port.
Parallel Port Mode = 00: Data EMIF mode. The 16 EMIF data signals and 13 EMIF control signals are
routed to the corresponding external parallel bus data and control signals. The
14 (LQFP) or 16 (BGA) address bus signals can be used as general-purpose I/O
only.
Parallel Port Mode = 01: Full EMIF mode. The 14 (LQFP) or 21 (BGA) address signals, 16 data signals, and
15 control signals are routed to the corresponding external parallel bus address,
data, and control signals.
Parallel Port Mode = 10: Non-multiplexed HPI mode. The HPI is enabled an its 14 address signals,
16 data signals, and 7 control signals are routed to the corresponding address,
data, control signals of the external parallel bus. Moreover, 8 control signals of the
external parallel bus are used as general-purpose I/O.
Parallel Port Mode = 11: Multiplexed HPI mode. The HPI is enabled and its 16 data signals and
10 control signals are routed to the external parallel bus. In addition, 3 control
signals of the external parallel bus are used as general-purpose I/O. The
14 (LQFP) or 16 (BGA) external parallel port address bus signals are used as
general-purpose I/O.
† Function available when the port or pins configured as input.



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