TMS320VC5507ZAY datasheet(76/139 Pages) TI1

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Electrical Specifications

April 2004 − Revised January 2008

SPRS244J

5.2.2 Recommended Operating Conditions for CVDD = 1.35 V (144 MHz)

MIN

NOM

MAX

UNIT

Core

CVDD

Device supply voltage

1.28

1.35

1.42

Peripherals

RCVDD

RTC module supply voltage, core

1.28

1.35

1.42

RDVDD

RTC module supply voltage, I/O (RTCINX1 and RTCINX2)

1.28

1.35

1.42

USBPLLVDD

USBPLL supply voltage†

1.28

1.35

1.42

USBVDD

USB module supply voltage, I/O (DP, DN, and PU)

3.3

3.6

DVDD

Device supply voltage, I/O (except DP, DN, PU, SDA, SCL)‡

2.7

3.3

3.6

ADVDD

A/D module digital supply voltage

2.7

3.3

3.6

AVDD

A/D module analog supply voltage

2.7

3.3

3.6

Grounds

VSS

Supply voltage, GND, I/O, and core

ADVSS

Supply voltage, GND, A/D module, digital

AVSS

Supply voltage, GND, A/D module, analog

USBPLLVSS

Supply voltage, GND, USBPLL

DN and DP§

2.0

VIH

High-level input voltage, I/O

SDA & SCL: VDD related input

levels‡

0.7*DVDD

DVDD(max) +0.5

VIH

High-level input voltage, I/O

All other inputs

(including hysteresis inputs)

2.0

DVDD + 0.3

DN and DP§

0.8

VIL

Low-level input voltage, I/O

SDA &SCL: VDD related input

levels‡

−0.5

0.3 * DVDD

VIL

Low-level input voltage, I/O

All other inputs

(including hysteresis inputs)

−0.3

0.8

Vhys

Hysteresis level

Inputs with hysteresis only

0.1*DVDD

IOH

High-level output current

DN and DP§ (VOH = 2.45 V)

−17.0

IOH

High-level output current

All other outputs

−4

DN and DP§ (VOL = 0.36 V)

17.0

IOL

Low-level output current

SDA and SCL‡

IOL

Low-level output current

All other outputs

Operating case temperature

−40

† USB PLL is susceptible to power supply ripple. The maximum allowable supply ripple is 1% for 1 Hz to 5 kHz; 1.5% for 5 kHz to 10 MHz; 3%

for 10 MHz to 100 MHz, and less than 5% for 100 MHz or greater.

‡ The I2C pins SDA and SCL do not feature fail-safe I/O buffers. These pins could potentially draw current when the device is powered down.

Due to the fact that different voltage devices can be connected to the I2C bus, the level of logic 0 (low) and logic 1 (high) are not fixed and

depends on the associated VDD.

§ USB I/O pins DP and DN can tolerate a short circuit at D+ and D− to 0 V or 5 V, as long as the recommended series resistors (see Figure 5−40)

are connected between the D+ and DP (package), and the D− and DN (package). Do not apply a short circuit to the USB I/O pins DP and DN

in absence of the series resistors.

TMS320VC5507ZAY Datasheet(PDF) 76 Page - Texas Instruments

TMS320VC5507ZAY Datasheet(HTML) 76 Page - Texas Instruments

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