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UPD78044F Datasheet(PDF) 8 Page - NEC |
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UPD78044F Datasheet(HTML) 8 Page - NEC |
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8 / 58 page  8 µPD78044H, 78045H, 78046H 2. BLOCK DIAGRAM Remark The capacity of the internal ROM differs depending on the product. TO0/P30 TI0/INTP0/P00 TO1/P31 P33 TO2/P32 P34 SI1/P20 SO1/P21 SCK1/P22 ANI0/P10- ANI7/P17 AVDD AVSS AVREF INTP0/TI0/P00- INTP3/P03 BUZ/P36 PCL/P35 16-bit timer/ event counter 8-bit timer/ event counter 1 8-bit timer/ event counter 2 Watchdog timer Watch timer Serial interface 1 A/D converter Interrupt control Buzzer output Clock output control VDD VSS IC RAM 1024 bytes 78K/0 CPU core ROM Port 0 Port 2 Port 3 Port 7 Port 8 Port 9 Port 10 Port 12 FIP controller/driver System control P00 P01-P03 P04 P10-P17 P20-P27 P30-P37 P70-P74 P80, P81 P90-P97 P100-P107 P110-P117 P120-P127 FIP0-FIP33 VLOAD RESET X1 X2 XT1/P04 XT2 Port 1 Port 11 |
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