UPD78044F datasheet(32/52 Pages) NEC

32 / 52 page

µPD780232

Data Sheet U13415EJ2V0DS

System Clock Oscillator Characteristics (TA = –40 to +85

°C, VDD = 4.5 to 5.5 V)

Resonator

Recommended Circuit

Parameter

Conditions

MIN. TYP. MAX. Unit

Ceramic resonator

Oscillation frequency

VDD = Oscillation

MHz

(fX)Note 1

voltage range

Oscillation stabilization After VDD reaches

timeNote 2

the minimum value of

oscillation voltage range

Crystal resonator

Oscillation frequency

MHz

(fX)Note 1

Oscillation stabilization

timeNote 2

External clock

X1 input frequency

MHz

(fX)Note 1

X1 input high-/low-level

450

width (tXH/tXL)

Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time.

2. Time required to stabilize oscillation after reset or STOP release.

Caution

When using the system clock oscillator, wire as follows in the area enclosed by the broken lines

in the above figures to avoid an adverse effect from wiring capacitance.

•

Keep the wiring length as short as possible.

•

Do not cross the wiring with the other signal lines.

•

Do not route the wiring near a signal line through which a high fluctuating current flows.

•

Always make the ground point of the oscillator capacitor the same potential as VSS1.

•

Do not ground the capacitor to a ground pattern through which a high current flows.

•

Do not fetch signals from the oscillator.

PD74HCU04

X1 X2

VSS1

X1 X2

VSS1

UPD78044F Datasheet(PDF) 32 Page - NEC

UPD78044F Datasheet(HTML) 32 Page - NEC

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