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UPD78044F Datasheet(PDF) 34 Page - NEC |
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UPD78044F Datasheet(HTML) 34 Page - NEC |
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34 / 52 page  34 µPD780232 Data Sheet U13415EJ2V0DS Capacitance (TA = 25 °C, VDD = VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input capacitance CIN f = 1 MHz P00 to P02, P20 to P27 15 pF Unmeasured pins returned to 0 V P50 to P57, P60 to P64 35 pF Output capacitance COUT f = 1 MHz P00 to P02, P20 to P27 15 pF Unmeasured pins returned to 0 V P30 to P37, P40 to P47, 35 pF P50 to P57, P60 to P64, FIP0 to FIP23 I/O CIO f = 1 MHz P00 to P02, P20 to P27 15 pF capacitance Unmeasured pins returned to 0 V P50 to P57, P60 to P64 35 pF DC Characteristics (TA = –40 to +85 °C, VDD = 4.5 to 5.5 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input voltage, high VIH1 P00 to P02, P20 to P27, RESET 0.7VDD VDD V VIH2 P50 to P57, P60 to P64 0.7VDD VDD V VIH3 X1, X2 VDD – 0.5 VDD V Input voltage, low VIL1 P00 to P02, P20 to P27, RESET 0 0.2VDD V VIL2 X1, X2 0 0.4 V Output voltage, high VOH IOH = –1 mA VDD – 1.0 VDD V IOH = –100 µAVDD – 0.5 VDD V Output voltage, low VOL P00 to P02, P20 to P27 IOL = 400 µA 0.5 V Input leakage ILIH1 P00 to P02, P20 to P27, P50 to P57, P60 to P64, RESET VIN = VDD 3 µA current, high ILIH2 X1, X2 20 µA Input leakage ILIL1 P00 to P02, P20 to P27, RESET VIN = 0 V –3 µA current, low ILIL2 X1, X2 –20 µA ILIH3 P50 to P57, P60 to P64 VIN = VLOAD = VDD – 40 V –10 µA Output leakage ILOH P00 to P02, P20 to P27, P30 to P37, VOUT = VDD 3 µA current, high P40 to P47, P50 to P57, P60 to P64 Output leakage ILOL1 P00 to P02, P20 to P27 VOUT = 0 V –3 µA current, low ILOL2 P30 to P37, P40 to P47, P50 to P57, P60 to P64 VOUT = VLOAD = VDD – 40 V –10 µA VFD output current IOD FIP0 to FIP19 VOD = VDD – 2 V –15 mA FIP20 to FIP52 –5 mA Software pull-up R1 P00 to P02, P20 to P27 VIN = 0 V 10 30 100 k Ω resistance On-chip mask option R2 P50 to P57, P60 to P64 15 35 90 k Ω pull-down resistance (VSS0 connection) On-chip mask option R3 FIP0 to FIP52 VOD – VLOAD 30 60 135 k Ω pull-down resistance = 40 V (VLOAD connection) Power supply IDD1 5 MHz crystal oscillation operation mode PCC = 00H 7 14 mA currentNote IDD2 5 MHz crystal oscillation HALT mode 1.5 4.5 mA IDD3 STOP mode 1 30 µA Note Refers to the current flowing to the VDD pin. The current flowing to the on-chip pull-up and pull-down resistors is not included. Remarks 1. Unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins. 2. PCC: Processor clock control register |
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