TMP47C101 datasheet(26/32 Pages) TOSHIBA

26 / 32 page

26/32

TOSHIBA CORPORATION

TMP47C101/201

Example: To generate an overﬂow interrupt (at fc =

4MHz) by the TC1 after 100ms.

HL, #0F4H

;

TC1

←E79

H (set-

ting of the count

#9, @HL+

#7, @HL+

#0EH, @HL+

A, #1000B

OP1C

←1000

OUT

A, %OP1C

A, #0100B

;

EIR

←0100

(enables interrupt)

EIR

EICLR IL, 110111B ;

EIF

←1, IL

3←0

Calculating the preset value of the count register

The preset value of the count register is obtained from

the following relation

212 - (interrupt setting time) x (internal pulse rate)

For example, to generate an overﬂow interrupt after

100ms at fc = 4MHz with the internal pulse rate of fc/

210, set the following value to the count register as the

preset value:

212 - (100 x 10-3) x (4 x 106/210) = 3705 = E79H

Table 3-3. Internal Pulse Rate Selection

Internal Pulse Rate

Max. Setting Time

Example: At fc = 4.194304MHz

Internal Pulse Rate

Max. Setting Time

fc/210 [Hz]

222/fc [s]

4096 [Hz]

1 [s]

fc/214

226

256

fc/218

230

256

fc/222

234

4096

(3)

Pulse width measurement mode

In the pulse width measurement mode, the timer/

counter increments with the pulse obtained by sam-

pling the external pins (T2) by the internal pulse. As

shown in Figure 3-11, the timer/counter increments

only while the external pin input is high. The maximum

applied frequency to the external pin input must be

one that is enough for analyzing the count value. Nor-

mally, a frequency sufﬁciently slower than the internal

pulse rate setting is applied to the external pin.

Figure 3-11. Pulse Width Measurement Mode Timing Chart

TMP47C101 Datasheet(PDF) 26 Page - Toshiba Semiconductor

TMP47C101 Datasheet(HTML) 26 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL