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TMS320F28075PZP Datasheet(PDF) 102 Page - Texas Instruments |
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TMS320F28075PZP Datasheet(HTML) 102 Page - Texas Instruments |
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102 / 192 page ![]() Note The VREFHI pin must be kept below VDDA + 0.3 V to ensure proper functional operation. If the VREFHI pin exceeds this level, a blocking circuit may activate, and the internal value of VREFHI may float to 0 V internally, giving improper ADC conversion or DAC output. Offset Error Code 2048 Figure 7-41. Buffered DAC Offset Code 3722 Code 373 Actual Gain Ideal Gain Linear Range (3.3-V Reference) Figure 7-42. Buffered DAC Gain TMS320F28076, TMS320F28075 SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021 www.ti.com 102 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28076 TMS320F28075 |
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