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Z86D7308HSC Datasheet(PDF) 28 Page - Zilog, Inc. |
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Z86D7308HSC Datasheet(HTML) 28 Page - Zilog, Inc. |
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28 / 92 page  Z86D73 40/44/48-Pin Low-Voltage IR OTP PS019402-1103 P R E L I M I N A R Y 22 Port 2 (P27–P20) Port 2 is an 8-bit, bidirectional, CMOS-compatible I/O port (see Figure 12). These eight I/O lines can be independently configured under software control as inputs or outputs. Port 2 is always available for I/O operation. A mask option is available to connect eight pull-up transistors on this port. Bits programmed as outputs are globally programmed as either push-pull or open-drain. The POR resets with the eight bits of Port 2 configured as inputs. Port 2 also has an 8-bit input OR and AND gate, which can be used to wake up the part. P20 can be programmed to access the edge-detection circuitry in demodulation mode. Figure 12. Port 2 Configuration Z86D73 OTP Port 2 (I/O) Pad In Out I/O Open-Drain Resistive transistor pull-up VCC Mask Option |
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