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56F8335 Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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56F8335 Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 160 page ![]() Signal Pins 56F8335 Technical Data, Rev. 1 Freescale Semiconductor 25 Preliminary MISO0 (GPIOE6) 125 Input/ Output Input/ Output Input Input SPI 0 Master In/Slave Out — This serial data pin is an input to a master device and an output from a slave device. The MISO line of a slave device is placed in the high-impedance state if the slave device is not selected. The slave device places data on the MISO line a half-cycle before the clock edge the master device uses to latch the data. Port E GPIO — This GPIO pin can be individually programmed as an input or output pin. After reset, the default state is MISO0. To deactivate the internal pull-up resistor, clear bit 6 in the GPIOE_PUR register. SS0 (GPIOE7) 123 Input Input/ Output Input Input SPI 0 Slave Select — SS0 is used in slave mode to indicate to the SPI module that the current transfer is to be received. Port E GPIO — This GPIO pin can be individually programmed as an input or output pin. After reset, the default state is SS0. To deactivate the internal pull-up resistor, clear bit 7 in the GPIOE_PUR register. PHASEA1 (TB0) (SCLK1) (GPIOC0) 9Schmitt Input Schmitt Input/ Output Schmitt Input/ Output Schmitt Input/ Output Input Input Input Input Phase A1 — Quadrature Decoder 1, PHASEA input for decoder 1. TB0 — Timer B, Channel 0 SPI 1 Serial Clock — In the master mode, this pin serves as an output, clocking slaved listeners. In slave mode, this pin serves as the data clock input. To activate the SPI function, set the PHSA_ALT bit in the SIM_GPS register. For details, see Part 6.5.8. Port C GPIO — This GPIO pin can be individually programmed as an input or output pin. In the 56F8335, the default state after reset is PHASEA1. In the 56F8135, the default state is not one of the functions offered and must be reconfigured. To deactivate the internal pull-up resistor, clear bit 0 in the GPIOC_PUR register. Table 2-2 Signal and Package Information for the 128-Pin LQFP Signal Name Pin No. Type State During Reset Signal Description |
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