STM32WB55 datasheet(191/193 Pages) STMICROELECTRONICS

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DS11929 Rev 11

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STM32WB55xx STM32WB35xx

Revision history

192

19-Feb-2020

Updated Features, Section 2: Description, I/O system current

consumption, Section 3.17: Touch sensing controller (TSC), Section 7.1:

UFBGA129 package information, Section 7.2: WLCSP100 package

information, Section 7.3: VFQFPN68 package information, Section 7.4:

UFQFPN48 package information, Section 7.5: Thermal characteristics

and Section 8: Ordering information.

Added JTAG/SWD interface characteristics, Device marking for

UFBGA129, Device marking for WLCSP100 and Device marking for

VFQFPN68.

Updated Table 2: STM32WB55xx devices features and peripheral

counts, Table 7: Features over all modes, Table 16: STM32WB55xx pin

and ball definitions, Table 17: Alternate functions, Table 18: Voltage

characteristics, Table 22: General operating conditions, Table 26: RF

receiver BLE characteristics (1 Mbps), Table 27: RF receiver BLE

characteristics (2 Mbps), Table 30: RF receiver 802.15.4 characteristics,

Table 47: Current under Reset condition, Table 61: LSI2 oscillator

characteristics and Table 104: Package thermal characteristics.

Added footnote 5 to Table 15: Legend/abbreviations used in the pinout

table.

Updated Figure 2: STM32WB55xx RF front-end block diagram, Figure 6:

Power supply overview, Figure 7: Clock tree, Figure 11: STM32WB55Vx

UFBGA129 ballout(1), Figure 14: Power supply scheme (all packages

except UFBGA129), Figure 36: UFBGA129 package outline and

Figure 47: UFQFPN48 marking example (package top view).

10-Apr-2020

Updated Section 3.6.5: Typical RF application schematic and

Section 6.3.10: External clock source characteristics.

Updated Table 16: STM32WB55xx pin and ball definitions and Table 54:

HSE crystal requirements.

Updated Figure 11: STM32WB55Vx UFBGA129 ballout(1) and Figure 14:

Power supply scheme (all packages except UFBGA129).

Minor text edits across the whole document.

17-Jun-2020

Introduced STM32WB55VY.

Updated Section 3.3.4: Embedded SRAM, Section 3.4: Security and

safety, Section 3.14: Analog to digital converter (ADC), Section 6.3.10:

External clock source characteristics and Section 8: Ordering

information.

Updated Table 1: Device summary, Table 2: STM32WB55xx and

STM32WB35xx devices features and peripheral counts, Table 26: RF

transmitter BLE characteristics (1 Mbps), Table 27: RF transmitter BLE

characteristics (2 Mbps), Table 65: Flash memory characteristics and

Table 77: ADC characteristics.

Updated Figure 10: STM32WB55Cx and STM32WB35Cx UFQFPN48

pinout(1)(2), Figure 11: STM32WB55Rx VFQFPN68 pinout(1)(2) and

Figure 17: Power supply scheme (UFBGA129 and WLCSP100

packages).

Updated footnote 5 of Table 15: Legend/abbreviations used in the pinout

table and footnote 8 of Table 16: STM32WB55xx pin and ball definitions.

Added footnote 3 to Table 16, footnote 2 to Figure 16, footnote 1 to

Table 86 and footnotes to tables 23, 30 and 33.

Added Table 55: HSE clock source requirements.

Table 107. Document revision history (continued)

Date

Revision

Changes

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