TMUX7348F datasheet(3/59 Pages) TI

3 / 59 page

5 Device Comparison Table

PRODUCT

DESCRIPTION

TMUX7348F

+60 V/ –60 V Tolerant, Fault-protected, Latch-up Immune, Single-Ended 8:1 Multiplexers with Adjustable Fault Threshold

TMUX7349F

+60 V/ –60 V Tolerant, Fault-protected, Latch-up Immune, Dual 4:1 Multiplexers with Adjustable Fault Threshold

6 Pin Configuration and Functions

VSS

GND

VDD

VFN

VFP

Not to scale

Figure 6-1. (Preview) PW Package, 20-Pin TSSOP

(Top View)

VSS

VDD

Not to scale

Thermal

Pad

Figure 6-2. RTJ Package, 20-Pin WQFN (Top View)

Table 6-1. Pin Functions: TMUX7348F

TYPE(1)

DESCRIPTION

NAME

TSSOP(2)

WQFN

Logic control input address 0 (A0). The pin has a 4 MΩ internal pull-down resistor. This pin can also

be used together with the specific fault pin (SF) to indicate which input is under fault. See Section

9.4.3 for more details.

Logic control input address 1 (A1). The pin has a 4 MΩ internal pull-down resistor. This pin can also

be used together with the specific fault pin (SF) to indicate which input is under fault. See Section

9.4.3 for more details.

Logic control input address 2 (A2). The pin has a 4 MΩ internal pull-down resistor. This pin can also

be used together with the specific fault pin (SF) to indicate which input is under fault. See Section

9.4.3 for more details.

I/O

Drain pin. Can be an input or output. The drain pin is not overvoltage protected and shall remain

within the recommended operating range.

Active high logic enable (EN) pin. The pin has a 4 MΩ internal pull-down resistor. The device is

disabled and all switches become high impedance when the pin is low. When the pin is high, the Ax

logic inputs determine individual switch states. See Section 9.4.3 for more details.

General fault flag. This pin is an open drain output and is asserted low when overvoltage condition is

detected on any of the source (Sx) input pins. Connect this pin to an external supply (1.8 V to 5.5 V)

through a 1 kΩ pull-up resistor.

GND

Ground (0 V) reference

I/O

Overvoltage protected source pin 1. Can be an input or output.

I/O

Overvoltage protected source pin 2. Can be an input or output.

I/O

Overvoltage protected source pin 3. Can be an input or output.

I/O

Overvoltage protected source pin 4. Can be an input or output.

I/O

Overvoltage protected source pin 5. Can be an input or output.

I/O

Overvoltage protected source pin 6. Can be an input or output.

I/O

Overvoltage protected source pin 7. Can be an input or output.

I/O

Overvoltage protected source pin 8. Can be an input or output.

Specific fault flag. This pin is an open drain output and is asserted low when overvoltage condition is

detected on a specific pin, depending on the state of A0, A1, and A2 , as shown in Table 9-1. Connect

this pin to an external supply (1.8 V to 5.5 V) through a 1 kΩ pull-up resistor.

www.ti.com

TMUX7348F

SCDS400 – MARCH 2022

Submit Document Feedback

Product Folder Links: TMUX7348F

TMUX7348F Datasheet(PDF) 3 Page - Texas Instruments

TMUX7348F Datasheet(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

Datasheet Download

Link URL