VV5430 datasheet(14/33 Pages) STMICROELECTRONICS

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Control Signals for Image Digitisation

VV5430

CD5430F-A

14/33

5.1

Image Capture Control Signal Timing

The time intervals given are correct for the recommended crystals:

Table 9 : Signal Timing

Name

CCIR

EIA

Crystal Frequency (FCKIN)

14.7456 MHz

12.0000 MHz

Pixel clock period (Tpck = 2/FCKIN)

135.63 nsec

166.67nsec

PV (Pixel clock) mark:space

1:1

PV high period (Tpv = Tpck/2)

67.82 nsec

83.34 nsec

Even (first) field period (Tfield)

20.032 msec

(313 x Tline)

16.7005 msec

(263 x Tline)

Odd (second) field period (Tfield)

19.968 msec

(312 x Tline)

16.637 msec

(262 x Tline)

FST duration (TFST)

7.73

µsec

(57 x Tpck)

6.1

µsec

(45 x Tpck)

Line period (Tline)

64.0 usec

(472 x Tpck)

63.5

µsec

(381 x Tpck)

LST duration (TLST)

4.61

µsec

(34 x Tpck)

4.66

µsec

(28 x Tpck)

First visible line delay (Tblank)

704.949

µsec

(11xTline + 7xTpck)

762.833

µsec

(12xTline + Tpck)

First visible pixel delay (Tporch)

10.58

µsec

(78 x Tpck)

8.833

µsec

(53 x Tpck)

Visible line period

52.083

µsec

(384 x Tpck)

53.333

µsec

(320 x Tpck)

Max AVO to PV setup time (Tpsu)

33.9 nsec

41.7nsec

Min. PV to AVO hold time (Tphd)

30nsec

40nsec

ODD to FST rise (TODD)

21.700 msec

(160 x Tpck)

11.500 msec

(69 x Tpck)

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