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F6922 Datasheet(PDF) 12 Page - Renesas Technology Corp |
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F6922 Datasheet(HTML) 12 Page - Renesas Technology Corp |
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12 / 16 page ![]() F6922 Datasheet R35DS0003EU0100 Rev.1.0 Jun 25, 2021 Page 12 5.3 Evaluation Board Operation This section provides general information about operating the F6922 evaluation board. For more information about the board, see the F69xx Evaluation Board Manual on the F6922 product page. 5.3.1. Single Power Supply Operation Connect the positive and negative outputs of a power supply (VDD) to J11. In addition, connect the positive output of the VDD supply to TP1. While there are two IREF pins on the F6922 device (which are individually accessible via TP1 and TP2 on the evaluation board), these pins (A4 and E4) are internally connected to the same node on the device, simultaneously controlling the bias of channels 1 and 2. Set the power supply to 0.95V and enable the power supply output. Monitor the VDD supply output current to confirm the nominal bias point is set correctly (approximately 31mA). 5.3.2. Independent VDD and IREF Bias Control 5.3.2.1. Two Voltage Sources Connect the positive and negative outputs of a power supply (VDD) to J11. In addition, connect the positive output of a second supply (VREF) to TP1 and the negative output to the negative output of the VDD supply. Set both power supplies to 0.95V and enable the power supply outputs. Monitor the IDD of the VDD supply to confirm the nominal bias point is set correctly (approximately 31mA). 5.3.2.2. Voltage Source and Current Source Connect the positive and negative outputs of a power supply (VDD) to J11. In addition, connect an independent current supply (IREF) to TP1 and the ground of the current supply to the negative terminal of the VDD supply. Set VDD to 0.95V, IREF to 100 μA, and enable the power supply outputs. Monitor the IDD of the VDD supply to confirm the nominal bias point is set correctly (approximately 31mA). |
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