ATO25F1GC-30EC datasheet(28/46 Pages) ETC

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Sep.2013. Rev 0.5

1Gbit Serial NAND Flash Memory

8.7

Page Program

The PAGE PROGRAM operation sequence programs 1 byte to 2112 bytes of data within a page.

The page program sequence is as follows:

• 06h (WRITE ENABLE)

• 02h/32h (PROGRAM LOAD)

• 10h (PROGRAM EXECUTE)

• 0Fh (GET FEATURE command to read the status)

Prior to performing the PROGRAM LOAD operation, a WRITE ENABLE (06h) command must be

issued. As with any command that changes the memory contents, the WRITE ENABLE must be

executed in order to set the WEL bit. If this command is not issued, then the rest of the program

sequence is ignored. WRITE ENABLE must be followed by a PROGRAM LOAD (02h/32h)

command. PROGRAM LOAD consists of an 8-bit Op code, followed by a 16-bit column address,

then the data bytes to be programmed. The data bytes are loaded into a page buffer that is 2112

bytes long. If more than 2112 bytes are loaded, then those additional bytes are ignored by the

page buffer. The command sequence ends when CS goes from LOW to HIGH. Figure 16 shows

the PROGRAM LOAD operation.

After the data is loaded, a PROGRAM EXECUTE (10h) command must be issued to initiate the

transfer of data from the page buffer to the main array. PROGRAM EXECUTE consists of an

8-bit Op code, followed by a 24-bit address. After the page/block address is registered, the

memory device starts the transfer from the page buffer to the main array, and is busy for tPROG

time. During this busy time, the status register can be polled to monitor the status of the

operation (refer to the Status Register section). When the operation completes successfully, the

next series of data can be loaded with the PROGRAM LOAD command. Only the Get Feature

and Reset command are valid while programming is in progress. The number of consecutive

partial page programming operation within the same page without an intervening erase operation

must not exceed 4 for main array and 4 for spare array. And the device is limited to one partial

page program per each area of main or spare array.

(Refer to Figure 5)

Figure 17. Program Load(02h) instruction sequence

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