ATO25F1GC-30EC datasheet(13/46 Pages) ETC

13 / 46 page

13/46

Sep.2013. Rev 0.5

1Gbit Serial NAND Flash Memory

Data Protection

The environments where non-volatile memory devices are used can be very noisy. No SPI

device can operate correctly in the presence of excessive noise. The block lock feature

provides the ability to protect the entire device, or ranges of blocks, from the PROGRAM and

ERASE operations. After power-up, the device is in the

“locked” state, i.e., bits 3, 4, and 5 of

the block lock register are set to 1. To unlock all the blocks, or a range of blocks, the SET

FEATURES command must be issued with the A0h feature address, including the data bits

shown in Table 6.. The operation for the SET FEATURES command is shown in Figure 13 on

page 25. When BRWD is set and WP is LOW, none of the writable bits (3, 4, 5, and 7) in the

block lock register can be set. Also, when a PROGRAM/ERASE command is issued to a

locked block, a status of C0h is returned. When an ERASE command is issued to a locked

block, the erase failure, 04h, is returned. When a PROGRAM command is issued to a locked

block, program failure, 08h, is returned.

Table 2.

Protected area sizes

BP2

BP1

BP0

Protected Rows

None-all unlocked

Upper 1/64 locked

Upper 1/32 locked

Upper 1/16 locked

Upper 1/8 locked

Upper 1/4 locked

Upper 1/2 locked

All locked (default)

For example, if all the blocks need to be unlocked after power-up, the following sequence

should be performed:

1. Issue SET FEATURES register write (1Fh)

2. Issue the feature address to unlock the block (A0h)

3. Issue 00h on data bits to unlock all blocks

ATO25F1GC-30EC Datasheet(PDF) 13 Page - List of Unclassifed Manufacturers