HT46R46E datasheet(17/45 Pages) HOLTEK

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HT46R46E/HT46C46E

Rev. 1.30

July 19, 2005

The PA5 and PA4 are pin-shared with INT and TMR pins

respectively.

The PB can also be used as A/D converter inputs. The

A/D function will be described later. There is a PWM

function shared with PD0. If the PWM function is en-

abled, the PWM signal will appear on PD0 (if PD0 is op-

erating in output mode). Writing

²1² to PD0 data register

will enable the PWM output function and writing

²0² will

force the PD0 to remain at

²0². The I/O functions of PD0

are as shown.

I/O

Mode

I/P

(Normal)

O/P

(Normal)

I/P

(PWM)

O/P

(PWM)

PD0

Logical

Input

Logical

Output

Logical

Input

PWM

It is recommended that unused or not bonded out I/O

lines should be set as output pins by software instruction

to avoid consuming power under input floating state.

PWM

The microcontroller provides 1 channel (6+2) bits PWM

output shared with PD0. The PWM channel has its data

of the PWM counter comes from fSYS. The PWM register

is an eight bits register. The waveforms of PWM output

are as shown. Once the PD0 is selected as the PWM

output and the output function of PD0 is enabled

(PDC.0=

²0²), writing 1 to PD0 data register will enable

the PWM output function and writing

²0² will force the

PD0 to stay at

²0².

A PWM cycle is divided into four modulation cycles

(modulation cycle 0~modulation cycle 3). Each modula-

tion cycle has 64 PWM input clock period. In a (6+2) bit

PWM function, the contents of the PWM register is di-

vided into two groups. Group 1 of the PWM register is

denoted by DC which is the value of PWM.7~PWM.2.

The group 2 is denoted by AC which is the value of

PWM.1~PWM.0.

In a PWM cycle, the duty cycle of each modulation cycle

is shown in the table.

Parameter

AC (0~3)

Duty Cycle

Modulation cycle i

(i=0~3)

i<AC

DC+1

³AC

The modulation frequency, cycle frequency and cycle

duty of the PWM output signal are summarized in the

following table.

PWM

Modulation

Frequency

PWM Cycle

Frequency

PWM Cycle

Duty

fSYS/64

fSYS/256

[PWM]/256

f S Y S / 2

P W M

[ P W M ] = 1 0 0

[ P W M ] = 1 0 1

P W M

[ P W M ] = 1 0 2

P W M

[ P W M ] = 1 0 3

P W M

P W M c y c l e : 2 5 6 / f S Y S

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

M o d u l a t i o n c y c l e 0

P W M m o d u l a t i o n p e r i o d : 6 4 / f S Y S

M o d u l a t i o n c y c l e 1

M o d u l a t i o n c y c l e 2

M o d u l a t i o n c y c l e 3

M o d u l a t i o n c y c l e 0

PWM

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