Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

SH32F2601P/032PR Datasheet(PDF) 65 Page - SINOWEALTH Electronic Ltd

Part # SH32F2601P/032PR
Description  32-bit High Performance Motor Control MCU Based on ARM® Star
PDF  370 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SINOWEALTH [SINOWEALTH Electronic Ltd]
Direct Link  https://en.sinowealth.com
Logo SINOWEALTH - SINOWEALTH Electronic Ltd

SH32F2601P/032PR Datasheet(HTML) 65 Page - SINOWEALTH Electronic Ltd

Back Button SH32F2601P/032PR Datasheet HTML 61Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 62Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 63Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 64Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 65Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 66Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 67Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 68Page - SINOWEALTH Electronic Ltd SH32F2601P/032PR Datasheet HTML 69Page - SINOWEALTH Electronic Ltd Next Button
Zoom Inzoom in Zoom Outzoom out
 65 / 370 page
background image
SH32F2601
65
10.3.8
AHB Peripheral Clock Enable Register (RCC_AHBENR)
Offset Address: 0x0020
Reset Value:
0x0000 0000
b31
b30
b29
b28
b27
b26
b25
b24
b23
b22
b21
b20
b19
b18
b17
b16
Reserved
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15
b14
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
Reserved
MAC
PEN
CRC
EN
SYS
CFG
EN
MCM
EN
GPI
OEN
-
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Symbol
Description
31 ~ 5
Reserved
-
4
MACPEN
Math co-processor clock enable
Set to ‘1’ or cleared by software
0: math co-processor clock is disabled
1: math co-processor clock is enabled
3
CRCEN
CRC clock enable
Set to ‘1’ or cleared by software
0: CRC clock is disabled
1: CRC clock is enabled
2
SYSCFGEN
SYSCFG clock enable
Set to ‘1’ or cleared by software
0: SYSCFG clock is disabled
1: SYSCFG clock is enabled
Note: The one-time register in this module cannot be reset.
1
MCMEN
MCM module external control clock enable
Set to ‘1’ or cleared by software
0: MCM clock is disabled
1: MCM clock is enabled
0
GPIOEN
GPIO configuration block clock enable
Set to ‘1’ or cleared by software
0: GPIO block clock is disabled
1: GPIO block clock is enabled



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com