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SH32F2601P/032PR Datasheet(PDF) 97 Page - SINOWEALTH Electronic Ltd |
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SH32F2601P/032PR Datasheet(HTML) 97 Page - SINOWEALTH Electronic Ltd |
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97 / 370 page ![]() SH32F2601 97 13.4.2 Port X Input Data Register (GPIOx_ IDR) Offset Address: 0x0004 + 0x80*x Reset Value: 0x0000 XXXX b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 Reserved - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 IDRy(y=15~0) RO X X X X X X X X X X X X X X X X Bit Symbol Description 31 ~ 16 Reserved - 15 ~ 0 IDRy(y=15~0) Port x input data register This register is read-only and stores the level value read by the port. 13.4.3 Port X Output Data Register (GPIOx_ ODR) Offset Address: 0x0008 + 0x80*x Reset Value: 0x0000 0000 b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 Reserved - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 ODRy(y=15~0) RW 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bit Symbol Description 31 ~ 16 Reserved - 15 ~ 0 ODRy(y=15~0) Port x output data register This register can be read and written by software. Through the BSRR register after it, the ODR can be bit-set and reset independently to implement atomic bit operations. |
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