CS43131 datasheet(117/156 Pages) CIRRUS

Part #	CS43131

Description	130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver and Impedance Detection

PDF	156 Pages

Scroll/Zoom	100%

Manufacturer	CIRRUS [Cirrus Logic]

Direct Link	http://www.cirrus.com

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117 / 156 page

DS1155F1

117

CS43131

7.2 PLL Registers

7.2.6

PLL Setting 6

Address 0x30008

R/W

76543210

PLL_OUT_DIV

Default

00010000

Bits

Name

Description

7:0

PLL_OUT_

DIV

Final PLL clock output divide value.

0001 0000 (Default)

7.2.7

PLL Setting 7

Address 0x3000A

R/W

76543210

PLL_CAL_RATIO

Default

10000000

Bits

Name

Description

7:0

PLL_CAL_

RATIO

PLL calibration ratio. See Section 4.7.2 for configuration details. Target value for PLL VCO calibration.

1000 0000 (Default)

7.2.8

PLL Setting 8

Address 0x3001B

R/W

76543210

—

PLL_MODE

—

Default

00010011

Bits

Name

Description

7:2

—

Reserved

PLL_MODE

500/512 factor used in PLL frequency calculation equation, Eq. 4-1.

0 No bypass

1 (Default) Bypass

0—

Reserved

7.2.9

PLL Setting 9

Address 0x40002

R/W

76543210

—

PLL_REF_PREDIV

Default

00000010

Bits

Name

Description

7:2

—

Reserved

1:0

PLL_REF_

PREDIV

PLL reference divide select.

00 Divide by 1

01 Divide by 2

10 (Default) Divide by 4

11 Divide by 8

CS43131 Datasheet(PDF) 117 Page - Cirrus Logic

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