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CS47L35 Datasheet(PDF) 294 Page - Cirrus Logic

Part # CS47L35
Description  Smart Codec with Low-Power Audio DSP
PDF  300 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L35 Datasheet(HTML) 294 Page - Cirrus Logic

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294
DS1085F3
CS47L35
6 Register Map
R1048148
(FFE54h)
DSP1_Ext_window_A
DSP1_
EXT_A_
PSIZE16
00
000
000
00
000
00
00000000h
DSP1_EXT_A_PAGE [15:0]
R1048150
(FFE56h)
DSP1_Ext_window_B
DSP1_
EXT_B_
PSIZE16
00
000
000
00
000
00
00000000h
DSP1_EXT_B_PAGE [15:0]
R1048152
(FFE58h)
DSP1_Ext_window_C
DSP1_
EXT_C_
PSIZE16
00
000
000
00
000
00
00000000h
DSP1_EXT_C_PAGE [15:0]
R1048154
(FFE5Ah)
DSP1_Ext_window_D
DSP1_
EXT_D_
PSIZE16
00
000
000
00
000
00
00000000h
DSP1_EXT_D_PAGE [15:0]
R1048160
(FFE60h)
DSP1_Identity
0
0
0
000
000
00
000
00
00000000h
0
0
0
000
000
00
DSP1_CORE_NUMBER [4:0]
R1048576
(100000h)
DSP2_PMEM_0
0
0
0
0
0
0
0
0
DSP2_PM_START [39:32]
00000000h
DSP2_PM_START [31:16]
R1048578
(100002h)
DSP2_PMEM_1
DSP2_PM_START [15:0]
00000000h
0
0
0
000
00
DSP2_PM_1 [39:32]
R1048580
(100004h)
DSP2_PMEM_2
DSP2_PM_1 [31:16]
00000000h
DSP2_PM_1 [15:0]
R1110010
(10EFFAh)
DSP2_PMEM_30717
0
0
0
0
0
0
0
0
DSP2_PM_20478 [39:32]
00000000h
DSP2_PM_20478 [31:16]
R1110012
(10EFFCh)
DSP2_PMEM_30718
DSP2_PM_20478 [15:0]
00000000h
0
0
0
000
00
DSP2_PM_END [39:32]
R1110014
(10EFFEh)
DSP2_PMEM_30719
DSP2_PM_END [31:16]
00000000h
DSP2_PM_END [15:0]
R1179648
(120000h)
DSP2_XMEM_0
0
0
0
0
0
0
0
0
DSP2_XM_START [23:16]
00000000h
DSP2_XM_START [15:0]
R1179650
(120002h)
DSP2_XMEM_1
0
0
0
000
00
DSP2_XM_1 [23:16]
00000000h
DSP2_XM_1 [15:0]
R1228796
(12BFFCh)
DSP2_XMEM_24574
0
0
0
0
0
0
0
0
DSP2_XM_24574 [23:16]
00000000h
DSP2_XM_24574 [15:0]
R1228798
(12BFFEh)
DSP2_XMEM_24575
0
0
0
000
00
DSP2_XM_END [23:16]
00000000h
DSP2_XM_END [15:0]
R1269760
(136000h)
DSP2_XMEM_EXT_0
0
0
0
0
0
0
0
0
DSP2_XM_EXT_START [23:16]
00000000h
DSP2_XM_EXT_START [15:0]
R1269762
(136002h)
DSP2_XMEM_EXT_1
0
0
0
0
0
0
0
0
DSP2_XM_EXT_1 [23:16]
00000000h
DSP2_XM_EXT_1 [15:0]
R1277948
(137FFCh)
DSP2_XMEM_EXT_
4094
0
0
0
0
0
0
0
0
DSP2_XM_EXT_4094 [23:16]
00000000h
DSP2_XM_EXT_4094 [15:0]
R1277950
(137FFEh)
DSP2_XMEM_EXT_
4095
0
0
0
0
0
0
0
0
DSP2_XM_EXT_END [23:16]
00000000h
DSP2_XM_EXT_END [15:0]
R1310720
(140000h)
DSP2_YMEM_0
0
0
0
0
0
0
0
0
DSP2_YM_START [23:16]
00000000h
DSP2_YM_START [15:0]
R1310722
(140002h)
DSP2_YMEM_1
0
0
0
000
00
DSP2_YM_1 [23:16]
00000000h
DSP2_YM_1 [15:0]
R1359868
(14BFFCh)
DSP2_YMEM_24574
0
0
0
0
0
0
0
0
DSP2_YM_24574 [23:16]
00000000h
DSP2_YM_24574 [15:0]
R1359870
(14BFFEh)
DSP2_YMEM_24575
0
0
0
000
00
DSP2_YM_END [23:16]
00000000h
DSP2_YM_END [15:0]
R1441792
(160000h)
DSP2_ZMEM_0
0
0
0
0
0
0
0
0
DSP2_ZM_START [23:16]
00000000h
DSP2_ZM_START [15:0]
R1441794
(160002h)
DSP2_ZMEM_1
0
0
0
0
0
0
0
0
DSP2_ZM_1 [23:16]
00000000h
DSP2_ZM_1 [15:0]
R1449980
(161FFCh)
DSP2_ZMEM_4094
0
0
0
000
00
DSP2_ZM_4094 [23:16]
00000000h
DSP2_ZM_4094 [15:0]
R1449982
(161FFEh)
DSP2_ZMEM_4095
0
0
0
000
00
DSP2_ZM_END [23:16]
00000000h
DSP2_ZM_END [15:0]
R1572352
(17FE00h)
DSP2_Config_1
0
0
0
000
000
00
00
DSP2_CLK_SEL [2:0]
00000000h
0
DSP2_RATE [3:0]
0
0
0
0
0
0
DSP2_
MEM_ENA
DSP2_
DBG_
CLK_ENA
0DSP2_
CORE_
ENA
DSP2_
START
R1572356
(17FE04h)
DSP2_Status_1
DSP2_
PING_
FULL
DSP2_
PONG_
FULL
0
0
0
0
0
0
DSP2_WDMA_ACTIVE_CHANNELS [7:0]
00000000h
0
0
0
000
000
00
000
00
R1572358
(17FE06h)
DSP2_Status_2
DSP2_DUALMEM_COLLISION_ADDR [15:0]
00000000h
0
0
0
000
000
00
0
DSP2_CLK_SEL_STS [2:0]
DSP2_
CLK_
AVAIL
R1572368
(17FE10h)
DSP2_WDMA_Buffer_1
DSP2_START_ADDRESS_WDMA_BUFFER_1 [15:0]
00000000h
DSP2_START_ADDRESS_WDMA_BUFFER_0 [15:0]
Table 6-2. Register Map Definition—32-bit region (Cont.)
Register
Name
31
15
30
14
29
13
28
12
27
11
26
10
25
9
24
8
23
7
22
6
21
5
20
4
19
3
18
2
17
1
16
0
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