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CS47L35 Datasheet(PDF) 296 Page - Cirrus Logic

Part # CS47L35
Description  Smart Codec with Low-Power Audio DSP
PDF  300 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L35 Datasheet(HTML) 296 Page - Cirrus Logic

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296
DS1085F3
CS47L35
6 Register Map
R1802238
(1B7FFEh)
DSP3_XMEM_EXT_
4095
0
0
0
0
0
0
0
0
DSP3_XM_EXT_END [23:16]
00000000h
DSP3_XM_EXT_END [15:0]
R1835008
(1C0000h)
DSP3_YMEM_0
0
0
0
0
0
0
0
0
DSP3_YM_START [23:16]
00000000h
DSP3_YM_START [15:0]
R1835010
(1C0002h)
DSP3_YMEM_1
0
0
0
000
00
DSP3_YM_1 [23:16]
00000000h
DSP3_YM_1 [15:0]
R1884156
(1CBFFCh)
DSP3_YMEM_24574
0
0
0
0
0
0
0
0
DSP3_YM_24574 [23:16]
00000000h
DSP3_YM_24574 [15:0]
R1884158
(1CBFFEh)
DSP3_YMEM_24575
0
0
0
000
00
DSP3_YM_END [23:16]
00000000h
DSP3_YM_END [15:0]
R1966080
(1E0000h)
DSP3_ZMEM_0
0
0
0
0
0
0
0
0
DSP3_ZM_START [23:16]
00000000h
DSP3_ZM_START [15:0]
R1966082
(1E0002h)
DSP3_ZMEM_1
0
0
0
0
0
0
0
0
DSP3_ZM_1 [23:16]
00000000h
DSP3_ZM_1 [15:0]
R1974268
(1E1FFCh)
DSP3_ZMEM_4094
0
0
0
000
00
DSP3_ZM_4094 [23:16]
00000000h
DSP3_ZM_4094 [15:0]
R1974270
(1E1FFEh)
DSP3_ZMEM_4095
0
0
0
000
00
DSP3_ZM_END [23:16]
00000000h
DSP3_ZM_END [15:0]
R2096640
(1FFE00h)
DSP3_Config_1
0
0
0
000
000
00
00
DSP3_CLK_SEL [2:0]
00000000h
0
DSP3_RATE [3:0]
0
0
0
0
0
0
DSP3_
MEM_ENA
DSP3_
DBG_
CLK_ENA
0DSP3_
CORE_
ENA
DSP3_
START
R2096644
(1FFE04h)
DSP3_Status_1
DSP3_
PING_
FULL
DSP3_
PONG_
FULL
0
0
0
0
0
0
DSP3_WDMA_ACTIVE_CHANNELS [7:0]
00000000h
0
0
0
000
000
00
000
00
R2096646
(1FFE06h)
DSP3_Status_2
DSP3_DUALMEM_COLLISION_ADDR [15:0]
00000000h
0
0
0
000
000
00
0
DSP3_CLK_SEL_STS [2:0]
DSP3_
CLK_
AVAIL
R2096656
(1FFE10h)
DSP3_WDMA_Buffer_1
DSP3_START_ADDRESS_WDMA_BUFFER_1 [15:0]
00000000h
DSP3_START_ADDRESS_WDMA_BUFFER_0 [15:0]
R2096658
(1FFE12h)
DSP3_WDMA_Buffer_2
DSP3_START_ADDRESS_WDMA_BUFFER_3 [15:0]
00000000h
DSP3_START_ADDRESS_WDMA_BUFFER_2 [15:0]
R2096660
(1FFE14h)
DSP3_WDMA_Buffer_3
DSP3_START_ADDRESS_WDMA_BUFFER_5 [15:0]
00000000h
DSP3_START_ADDRESS_WDMA_BUFFER_4 [15:0]
R2096662
(1FFE16h)
DSP3_WDMA_Buffer_4
DSP3_START_ADDRESS_WDMA_BUFFER_7 [15:0]
00000000h
DSP3_START_ADDRESS_WDMA_BUFFER_6 [15:0]
R2096672
(1FFE20h)
DSP3_RDMA_Buffer_1
DSP3_START_ADDRESS_RDMA_BUFFER_1 [15:0]
00000000h
DSP3_START_ADDRESS_RDMA_BUFFER_0 [15:0]
R2096674
(1FFE22h)
DSP3_RDMA_Buffer_2
DSP3_START_ADDRESS_RDMA_BUFFER_3 [15:0]
00000000h
DSP3_START_ADDRESS_RDMA_BUFFER_2 [15:0]
R2096676
(1FFE24h)
DSP3_RDMA_Buffer_3
DSP3_START_ADDRESS_RDMA_BUFFER_5 [15:0]
00000000h
DSP3_START_ADDRESS_RDMA_BUFFER_4 [15:0]
R2096688
(1FFE30h)
DSP3_DMA_Config_1
0
0
0
0
0
0
0
0
DSP3_WDMA_CHANNEL_ENABLE [7:0]
00000000h
0
0
DSP3_DMA_BUFFER_LENGTH [13:0]
R2096690
(1FFE32h)
DSP3_DMA_Config_2
0
0
0
000
000
00
000
00
00000000h
0
0
0
0
0
0
0
0
DSP3_WDMA_CHANNEL_OFFSET [7:0]
R2096692
(1FFE34h)
DSP3_DMA_Config_3
0
0
0
0
0
0
0
0
0
0
DSP3_RDMA_CHANNEL_OFFSET [5:0]
00000000h
0
0
0
000
000
0
DSP3_RDMA_CHANNEL_ENABLE [5:0]
R2096694
(1FFE36h)
DSP3_DMA_Config_4
0
0
0
000
000
00
000
00
00000000h
0
0
0
000
000
00
000
0
DSP3_
DMA_
WORD_
SEL
R2096696
(1FFE38h)
DSP3_External_Start
0
0
0
000
000
00
000
00
00000000h
0
0
0
000
000
00
DSP3_START_IN_SEL [4:0]
R2096704
(1FFE40h)
DSP3_Scratch_1
DSP3_SCRATCH_1 [15:0]
00000000h
DSP3_SCRATCH_0 [15:0]
R2096706
(1FFE42h)
DSP3_Scratch_2
DSP3_SCRATCH_3 [15:0]
00000000h
DSP3_SCRATCH_2 [15:0]
R2096722
(1FFE52h)
DSP3_Bus_Error_Addr
DSP3_BUS_ERROR_ADDR_HI [15:0]
00000000h
DSP3_BUS_ERROR_ADDR_LOW [15:0]
R2096724
(1FFE54h)
DSP3_Ext_window_A
DSP3_
EXT_A_
PSIZE16
00
000
000
00
000
00
00000000h
DSP3_EXT_A_PAGE [15:0]
R2096726
(1FFE56h)
DSP3_Ext_window_B
DSP3_
EXT_B_
PSIZE16
00
000
000
00
000
00
00000000h
DSP3_EXT_B_PAGE [15:0]
R2096728
(1FFE58h)
DSP3_Ext_window_C
DSP3_
EXT_C_
PSIZE16
00
000
000
00
000
00
00000000h
DSP3_EXT_C_PAGE [15:0]
Table 6-2. Register Map Definition—32-bit region (Cont.)
Register
Name
31
15
30
14
29
13
28
12
27
11
26
10
25
9
24
8
23
7
22
6
21
5
20
4
19
3
18
2
17
1
16
0
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