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FS8108
the wireless IC company
Page 3
June 2001
Pin Descriptions
Block Diagram
Number
Name
I/O
Description
1XIN
I
Reference crystal oscillator or external clock input with internally biased amplifier
(any external input to XIN must be ac-coupled)
2
XOUT
O
Reference crystal oscillator or external clock output
3
VDD2
POWER
Nominal 3.0 V supply voltage
4
DB
O
Single-ended quick-lock output for faster locking
5
DO
O
Single-ended charge pump output for passive low pass filter
6
VSS
GND
Ground
7FIN
I
VCO frequency input with internally biased input amplifier
(any external input to FIN must be ac-coupled)
8
VDD1
POWER
Nominal 1.0 V supply voltage
9
NC
NC
No connection
10
LD
O
Lock detector output (high when PLL is locked)
11
CLK
I
Shift register clock input
12
DATA
I
Serial data input
13
LE
I
Latch enable input
14
OPR
I
Battery-save control input; normal operation when high, stand-by mode when low
15
NC
NC
No connection
16
TEST
I
Test mode control input with internal pull-down resistor
PFD
CHARGE
PUMP
FIN
DATA
CLK
LE
TEST
XIN
CONTROL
LOGIC
N-COUNTER
R-COUNTER
SHIFT REGISTER
N-LATCH
R-LATCH
÷ 8
÷ 64/65
LD
DO
XOUT
LOCK
DETECTOR
QUICK-
DB
WINDOW
GENERATOR
OPR
LOCK
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