XK-EVK-XU316 xcore.ai Evaluation Kit Manual

GPIO connector J15 (Tile 1):

Signal

Port

Pin

Signal

Port

Pin

GND

1

X1D61

P32A10

2

X1D62

P32A11

3

GND

4

X1D63

P32A12

5

X1D64

P32A13

6

X1D65

P32A14

7

GND

8

GND

9

X1D66

P32A15

10

X1D67

P32A16

11

X1D68

P32A17

12

GND

13

X1D69

P32A18

14

X1D70

P32A19

15

GND

16

GPIO connector J12, just below the device is powered from 1V8, and has IO from tile 0

and tile 1:

Signal

Port

Pin

Signal

Port

Pin

1V8

1

X0D12

P1E

2

X0D02

P4A0

3

GND

4

X0D03

P4A1

5

X0D22

P1G

6

X0D23

P1H

7

GND

8

GND

9

X1D12

P1E

10

X1D23

P1H

11

X0D08

P4A2

12

GND

13

X0D09

P4A3

14

X0D13

P1F

15

GND

16

Electrical characteristics of all I/O pins are detailed in the datasheet, XM-014034-PC.

11