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M61251AFP Datasheet(PDF) 12 Page - Renesas Technology Corp

Part # M61251AFP
Description  Single-chip NTSC TV signal processor
PDF  16 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M61251AFP Datasheet(HTML) 12 Page - Renesas Technology Corp

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M61251AFP
Rev.1.0, Sep.22.2003, page 12 of 15
Write (Cont)
Function
Bit
Sub-
address
Data
Description
Initial
value
Note
AFC2 horizontal
phase
5
16H
D0 to D4
Adjustment of horizontal phase of
display
90H
Ramp stop
1
09H
D6
Pin 5 VOUT (ramp / pulse) forcible stop
mode (when stopped, pin 5 is at
ground level). 0: VOUT, 1: stopped
0
Service switch
1
13H
D3
Vertical output on / off, 0: vertical
output on, 1: vertical output off
0
Horizontal start
1
13H
D4
Horizontal output out / stopped. 0:
stopped, 1: H OUT
0
AFC1 gain
1
15H
D7
Horizontal AFC gain high / low. 0: low,
1: high
0
AFC2 gain
1
15H
D6
Horizontal AFC2 gain high/low. 0: high,
1: low
0
Horizontal VCO
adjustment
3
10H
D0 to D2
Adjustment of horizontal VCO free-
running frequency
24H
Vertical shift
3
13H
D0 to D2
Adjustment of vertical ramp start timing
X0H
Vertical size
6
11H
D0 to D5
Adjustment of vertical ramp amplitude
20H
Horizontal free
1
13H
D7
Horizontal output forced free-run mode
on/off. 0: off, 1: horizontal free-run
0
Vertical free
1
10H
D6
Vertical output forced free-run mode
on/off. 0: off, 1: vertical free-run
0
S slice down 1
1
14H
D2
Sync detection slice level (50 / 30%). 0:
50%, 1: 30%
0
S slice down 2
1
14H
D3
Sync detection slice level (50 / 40%),
0: 50%, 1: 40%
0
Auto slice down
1
16H
D6
Synchronous detection slice level
during video period, 0: Slice level
remains constant, 1: slice level
decreased during video period
0
FBP Vth L
1
16H
D5
Pin 10 (FBP in) FBP slice level. 0: Vth
= 2 V (HBLK width: narrow), 1: Vth = 1
V (HBLK width: wide)
0
HV BLK OFF
1
09H
D7
Horizontal / vertical blanking. 0:
blanking ON, 1: blanking OFF
0
Vertical sync.
detection
1
16H
D7
Minimum width for vertical sync
detection. 0: synchronous detection
width = 18 us, 1: synchronous
detection width = 14 us
90H
One window
1
13H
D6
Minimum width for vertical sync
detection (1 / 2 windows). 0: 2
windows, 1: 1 window
0
D
E
F
BGPFBP off
1
19H
D7
Internal BGP on / off when there is no
FBP input. 0: BGP on, 1: BGP off
0



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