EM6821 datasheet(48/68 Pages) EMMICRO

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EM6821

www.emmicroelectronic.com

14.3 Free Segment Allocation

Each Segment (SEG[20:1]) terminal outputs the time multiplexed information from its 4 Segment data latches.

Information stored in latch 1 is output during phase1, latch 2 during phase 2, latch 3 during phase 3 and latch 4

during phase 4. In the case of 3 to 1 multiplexing the phase 4 and the latch 4 are not used. This phase

information on the segment outputs together with the common outputs (COM[4:1]) - also called back-planes -

defines if a given LCD segment is light or not. COM[1] is on during phase 1 and off during phase 2,3,4 ,

COM[2] is on during phase 2 and off during phase 1,3,4 , etc.

For each segment data latch the address location within the LCD address spacing (LCD_3 + Index(8), LCD_2

+ Index(16), LCD_1 + Index(16) --> LCDAdr[39:0]) can be user defined.

For each segment data latch the data bus connection (DB[3:0]) can be user defined.

Table 14.3.1 Default LCD Configuration

Segment outputs

COM[1]

= phase1

COM[2]

= phase2

COM[3]

= phase3

COM[4]

= phase4

SEG[1]

DB[0], LCDAdr[0]

DB[1], LCDAdr[0]

DB[2], LCDAdr[0]

DB[3], LCDAdr[0]

SEG[2]

DB[0], LCDAdr[1]

DB[1], LCDAdr[1]

DB[2], LCDAdr[1]

DB[3], LCDAdr[1]

SEG[3]

DB[0], LCDAdr[2]

DB[1], LCDAdr[2]

DB[2], LCDAdr[2]

DB[3], LCDAdr[2]

...

SEG[18]

DB[0], LCDAdr[18]

DB[1], LCDAdr[18]

DB[2], LCDAdr[18]

DB[3], LCDAdr[18]

SEG[19]

DB[0], LCDAdr[19]

DB[1], LCDAdr[19]

DB[2], LCDAdr[19]

DB[3], LCDAdr[19]

SEG[20]

DB[0], LCDAdr[20]

DB[1], LCDAdr[20]

DB[2], LCDAdr[20]

DB[3], LCDAdr[20]

14.4 LCD Registers

Table 14.4.1 Register RegLcdCntl1

Bit

Name

Reset

R/W

Description

StrobeOutSel1

POR to ‘0’

R/W

Strobe output select

StrobeOutSel0

POR to ‘0’

R/W

Strobe output select

CkTripSel1

R/W

LCD multiplier clock select

CkTripSel0

R/W

LCD multiplier clock select

StrobeOutSel1,0 is reset by initial power on only.

Table 14.4.2 Multiplier Clock Frequency Select

CkTripSel0

CkTripSel1

Multiplier Clock

on 32 KHz operation

Ck[10]

512 Hz

Ck[9]

256 Hz

Ck[8]

128 Hz

Ck[7]

64 Hz

Table 14.4.3 Register LcdCntl2

Bit

Name

Reset

R/W

Description

LCDBlank

R/W

LCD Segment outputs off

LCDOff

R/W

LCD off (multiplier off)

LCD4Mux

R/W

4 : 1 multiplexed

LCDExtSupply

POR to ‘0’

R/W

External supply for VL1, VL2 and VL3

LCDExtSupply is reset to ‘0’ by POR only.

EM6821 Datasheet(PDF) 48 Page - EM Microelectronic - MARIN SA

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